radix dec ; Code bank 0; Start address: 0; End address: 4095 org 0 ; Define start addresses for data regions shared___globals equ 112 globals___0 equ 32 globals___1 equ 160 globals___2 equ 288 __indf equ 0 __pcl equ 2 __status equ 3 __fsr equ 4 __c___byte equ 3 __c___bit equ 0 __z___byte equ 3 __z___bit equ 2 __rp0___byte equ 3 __rp0___bit equ 5 __rp1___byte equ 3 __rp1___bit equ 6 __irp___byte equ 3 __irp___bit equ 7 __pclath equ 10 __cb0___byte equ 10 __cb0___bit equ 3 __cb1___byte equ 10 __cb1___bit equ 4 ; # Copyright (c) 2005 by Wayne C. Gramlich ; # All rights reserved. ; buffer = 'midimotor2' ; line_number = 6 ; library _pic16f688 entered ; # Copyright (c) 2004-2006 by Wayne C. Gramlich ; # All rights reserved. ; buffer = '_pic16f688' ; line_number = 6 ; processor pic16f688 ; line_number = 7 ; configure_address 0x2007 ; line_number = 8 ; configure_fill 0x3000 ; line_number = 9 ; configure_option fcmen: on = 0x800 ; line_number = 10 ; configure_option fcmen: off = 0x000 ; line_number = 11 ; configure_option ieso: on = 0x400 ; line_number = 12 ; configure_option ieso: off = 0x000 ; line_number = 13 ; configure_option boden: on = 0x300 ; line_number = 14 ; configure_option boden: partial = 0x200 ; line_number = 15 ; configure_option boden: sboden = 0x100 ; line_number = 16 ; configure_option boden: off = 0x000 ; line_number = 17 ; configure_option cpd: on = 0x00 ; line_number = 18 ; configure_option cpd: off = 0x80 ; line_number = 19 ; configure_option cp: on = 0x00 ; line_number = 20 ; configure_option cp: off = 0x40 ; line_number = 21 ; configure_option mclre: on = 0x20 ; line_number = 22 ; configure_option mclre: off = 0x00 ; line_number = 23 ; configure_option pwrte: on = 0x00 ; line_number = 24 ; configure_option pwrte: off = 0x10 ; line_number = 25 ; configure_option wdte: on = 8 ; line_number = 26 ; configure_option wdte: off = 0 ; line_number = 27 ; configure_option fosc: rc_clk = 7 ; line_number = 28 ; configure_option fosc: rc_no_clk = 6 ; line_number = 29 ; configure_option fosc: int_clk = 5 ; line_number = 30 ; configure_option fosc: int_no_clk = 4 ; line_number = 31 ; configure_option fosc: ec = 3 ; line_number = 32 ; configure_option fosc: hs = 2 ; line_number = 33 ; configure_option fosc: xt = 1 ; line_number = 34 ; configure_option fosc: lp = 0 ; line_number = 36 ; code_bank 0x0 : 0xfff ; line_number = 37 ; data_bank 0x0 : 0x7f ; line_number = 38 ; data_bank 0x80 : 0xff ; line_number = 39 ; data_bank 0x100 : 0x17f ; line_number = 40 ; data_bank 0x180 : 0x1ff ; line_number = 42 ; global_region 0x20 : 0x6f ; line_number = 43 ; icd2_global_region 0x20 : 0x6f ; line_number = 45 ; global_region 0xa0 : 0xef ; line_number = 46 ; icd2_global_region 0xa0 : 0xef ; line_number = 48 ; global_region 0x120 : 0x16f ; line_number = 49 ; icd2_global_region 0x120 : 0x164 ; line_number = 51 ; shared_region 0x70 : 0x7f ; line_number = 52 ; icd2_shared_region 0x71 : 0x7f ; line_number = 54 ; interrupts_possible ; line_number = 55 ; packages pdip=14, soic=14, tssop=14 ; line_number = 56 ; pin vdd, power_supply ; line_number = 57 ; pin_bindings pdip=1, soic=1, tssop=1 ; line_number = 58 ; pin ra5_in, ra5_nc, ra5_out, t1cki, osc1, clkin ; line_number = 59 ; pin_bindings pdip=2, soic=2, tssop=2 ; line_number = 60 ; bind_to _porta@5 ; line_number = 61 ; or_if ra5_in _trisa 32 ; line_number = 62 ; or_if ra5_nc _trisa 32 ; line_number = 63 ; or_if ra5_out _trisa 0 ; line_number = 64 ; or_if osc1 _trisa 32 ; line_number = 65 ; pin ra4_in, ra4_nc, ra4_out, t1g, osc2, an3, clkout ; line_number = 66 ; pin_bindings pdip=3, soic=3, tssop=3 ; line_number = 67 ; bind_to _porta@4 ; line_number = 68 ; or_if ra4_in _trisa 16 ; line_number = 69 ; or_if ra4_nc _trisa 16 ; line_number = 70 ; or_if ra4_out _trisa 0 ; line_number = 71 ; or_if an3 _trisa 16 ; line_number = 72 ; or_if osc2 _trisa 16 ; line_number = 73 ; or_if ra4_in _ansel 0 ; line_number = 74 ; or_if ra4_out _ansel 0 ; line_number = 75 ; or_if an3 _ansel 8 ; line_number = 76 ; or_if ra4_in _adcon0 0 ; line_number = 77 ; or_if ra4_out _adcon0 0 ; line_number = 78 ; or_if an3 _adcon0 1 ; line_number = 79 ; pin ra3_in, ra3_nc, mclr, vpp ; line_number = 80 ; pin_bindings pdip=4, soic=4, tssop=4 ; line_number = 81 ; bind_to _porta@3 ; line_number = 82 ; or_if ra3_in _trisa 8 ; line_number = 83 ; or_if ra3_nc _trisa 8 ; line_number = 84 ; pin rc5_in, rc5_nc, rc5_out, rx, dt ; line_number = 85 ; pin_bindings pdip=5, soic=5, tssop=5 ; line_number = 86 ; bind_to _portc@5 ; line_number = 87 ; or_if rc5_in _trisc 32 ; line_number = 88 ; or_if rc5_nc _trisc 32 ; line_number = 89 ; or_if rc5_out _trisc 0 ; line_number = 90 ; or_if rx _trisc 32 ; line_number = 91 ; pin rc4_in, rc4_nc, rc4_out, c2out, tx, ck ; line_number = 92 ; pin_bindings pdip=6, soic=6, tssop=6 ; line_number = 93 ; bind_to _portc@4 ; line_number = 94 ; or_if rc4_in _trisc 16 ; line_number = 95 ; or_if rc4_nc _trisc 16 ; line_number = 96 ; or_if rc4_out _trisc 0 ; # The UART documentation says TX must be marked as in input: ; line_number = 98 ; or_if tx _trisc 16 ; line_number = 99 ; pin rc3_in, rc3_nc, rc3_out, an7 ; line_number = 100 ; pin_bindings pdip=7, soic=7, tssop=7 ; line_number = 101 ; bind_to _portc@3 ; line_number = 102 ; or_if rc3_in _trisc 8 ; line_number = 103 ; or_if rc3_nc _trisc 8 ; line_number = 104 ; or_if rc3_out _trisc 0 ; line_number = 105 ; or_if an7 _trisc 8 ; line_number = 106 ; or_if rc3_in _ansel 0 ; line_number = 107 ; or_if rc3_out _ansel 0 ; line_number = 108 ; or_if an7 _ansel 128 ; line_number = 109 ; or_if rc3_in _adcon0 0 ; line_number = 110 ; or_if rc3_out _adcon0 0 ; line_number = 111 ; or_if an7 _adcon0 1 ; line_number = 112 ; pin rc2_in, rc2_nc, rc2_out, an6 ; line_number = 113 ; pin_bindings pdip=8, soic=8, tssop=8 ; line_number = 114 ; bind_to _portc@2 ; line_number = 115 ; or_if rc2_in _trisc 4 ; line_number = 116 ; or_if rc2_nc _trisc 4 ; line_number = 117 ; or_if rc2_out _trisc 0 ; line_number = 118 ; or_if an6 _trisc 4 ; line_number = 119 ; or_if rc2_in _ansel 0 ; line_number = 120 ; or_if rc2_out _ansel 0 ; line_number = 121 ; or_if an6 _ansel 64 ; line_number = 122 ; or_if rc2_in _adcon0 0 ; line_number = 123 ; or_if rc2_out _adcon0 0 ; line_number = 124 ; or_if an6 _adcon0 1 ; line_number = 125 ; pin rc1_in, rc1_nc, rc1_out, an5, c2in_minus ; line_number = 126 ; pin_bindings pdip=9, soic=9, tssop=9 ; line_number = 127 ; bind_to _portc@1 ; line_number = 128 ; or_if rc1_in _trisc 2 ; line_number = 129 ; or_if rc1_nc _trisc 2 ; line_number = 130 ; or_if rc1_out _trisc 0 ; line_number = 131 ; or_if rc1_in _cmcon0 7 ; line_number = 132 ; or_if rc1_out _cmcon0 7 ; line_number = 133 ; or_if an5 _trisc 2 ; line_number = 134 ; or_if rc1_in _ansel 0 ; line_number = 135 ; or_if rc1_out _ansel 0 ; line_number = 136 ; or_if an5 _ansel 32 ; line_number = 137 ; or_if rc1_in _adcon0 0 ; line_number = 138 ; or_if rc1_out _adcon0 0 ; line_number = 139 ; or_if an5 _adcon0 1 ; line_number = 140 ; pin rc0_in, rc0_nc, rc0_out, an4, c2in_plus ; line_number = 141 ; pin_bindings pdip=10, soic=10, tssop=10 ; line_number = 142 ; bind_to _portc@0 ; line_number = 143 ; or_if rc0_in _trisc 1 ; line_number = 144 ; or_if rc0_nc _trisc 1 ; line_number = 145 ; or_if rc0_out _trisc 0 ; line_number = 146 ; or_if rc0_in _cmcon0 7 ; line_number = 147 ; or_if rc0_out _cmcon0 7 ; line_number = 148 ; or_if an4 _trisc 1 ; line_number = 149 ; or_if rc0_in _ansel 0 ; line_number = 150 ; or_if rc0_out _ansel 0 ; line_number = 151 ; or_if an4 _ansel 16 ; line_number = 152 ; or_if rc0_in _adcon0 0 ; line_number = 153 ; or_if rc0_out _adcon0 0 ; line_number = 154 ; or_if an4 _adcon0 1 ; line_number = 155 ; pin ra2_in, ra2_nc, ra2_out, an2, c1out, t0cki, int ; line_number = 156 ; pin_bindings pdip=11, soic=11, tssop=11 ; line_number = 157 ; bind_to _porta@2 ; line_number = 158 ; or_if ra2_in _trisa 4 ; line_number = 159 ; or_if ra2_nc _trisa 4 ; line_number = 160 ; or_if ra2_out _trisa 0 ; line_number = 161 ; or_if an2 _trisa 4 ; line_number = 162 ; or_if ra2_in _ansel 0 ; line_number = 163 ; or_if ra2_out _ansel 0 ; line_number = 164 ; or_if an2 _ansel 4 ; line_number = 165 ; or_if ra2_in _adcon0 0 ; line_number = 166 ; or_if ra2_out _adcon0 0 ; line_number = 167 ; or_if an2 _adcon0 1 ; line_number = 168 ; pin ra1_in, ra1_nc, ra1_out, an1, c1in_minus, vref, icspclk ; line_number = 169 ; pin_bindings pdip=12, soic=12, tssop=12 ; line_number = 170 ; bind_to _porta@1 ; line_number = 171 ; or_if ra1_in _trisa 2 ; line_number = 172 ; or_if ra1_nc _trisa 2 ; line_number = 173 ; or_if ra1_out _trisa 0 ; line_number = 174 ; or_if ra1_in _cmcon0 7 ; line_number = 175 ; or_if ra1_out _cmcon0 7 ; line_number = 176 ; or_if an1 _trisa 2 ; line_number = 177 ; or_if vref _trisa 2 ; line_number = 178 ; or_if ra1_in _ansel 0 ; line_number = 179 ; or_if ra1_out _ansel 0 ; line_number = 180 ; or_if an1 _ansel 2 ; line_number = 181 ; or_if vref _ansel 2 ; line_number = 182 ; or_if ra1_in _adcon0 0 ; line_number = 183 ; or_if ra1_out _adcon0 0 ; line_number = 184 ; or_if an1 _adcon0 1 # Turn on _addon ; line_number = 185 ; or_if vref _adcon0 1 # Turn on _addon ; line_number = 186 ; or_if vref _adcon0 64 # Turn of _vcfg ; line_number = 187 ; pin ra0_in, ra0_nc, ra0_out, an0, c1in_plus, icspdat, ulpwu ; line_number = 188 ; pin_bindings pdip=13, soic=13, tssop=13 ; line_number = 189 ; bind_to _porta@0 ; line_number = 190 ; or_if ra0_in _trisa 1 ; line_number = 191 ; or_if ra0_nc _trisa 1 ; line_number = 192 ; or_if ra0_out _trisa 0 ; line_number = 193 ; or_if ra0_in _cmcon0 7 ; line_number = 194 ; or_if ra0_out _cmcon0 7 ; line_number = 195 ; or_if an0 _trisa 1 ; line_number = 196 ; or_if ra0_in _ansel 0 ; line_number = 197 ; or_if ra0_out _ansel 0 ; line_number = 198 ; or_if an0 _ansel 1 ; line_number = 199 ; or_if ra0_in _adcon0 0 ; line_number = 200 ; or_if ra0_out _adcon0 0 ; line_number = 201 ; or_if an0 _adcon0 1 ; line_number = 202 ; pin vss, ground ; line_number = 203 ; pin_bindings pdip=14, soic=14, tssop=14 ; line_number = 205 ; library _standard entered ; # Copyright (c) 2006 by Wayne C. Gramlich ; # All rights reserved. ; # Standard definition for uCL: ; buffer = '_standard' ; line_number = 8 ; constant _true = (1 = 1) _true equ 1 ; line_number = 9 ; constant _false = (0 != 0) _false equ 0 ; buffer = '_pic16f688' ; line_number = 205 ; library _standard exited ; # Register/bit bindings: ; # Databank 0 (0x0 - 0x7f): ; line_number = 216 ; register _indf = _indf equ 0 ; line_number = 218 ; register _tmr0 = _tmr0 equ 1 ; line_number = 220 ; register _pcl = _pcl equ 2 ; line_number = 222 ; register _status = _status equ 3 ; line_number = 223 ; bind _irp = _status@7 _irp___byte equ _status _irp___bit equ 7 ; line_number = 224 ; bind _rp1 = _status@5 _rp1___byte equ _status _rp1___bit equ 5 ; line_number = 225 ; bind _rp0 = _status@5 _rp0___byte equ _status _rp0___bit equ 5 ; line_number = 226 ; bind _to = _status@4 _to___byte equ _status _to___bit equ 4 ; line_number = 227 ; bind _pd = _status@3 _pd___byte equ _status _pd___bit equ 3 ; line_number = 228 ; bind _z = _status@2 _z___byte equ _status _z___bit equ 2 ; line_number = 229 ; bind _dc = _status@1 _dc___byte equ _status _dc___bit equ 1 ; line_number = 230 ; bind _c = _status@0 _c___byte equ _status _c___bit equ 0 ; line_number = 232 ; register _fsr = _fsr equ 4 ; line_number = 234 ; register _porta = _porta equ 5 ; line_number = 235 ; register _ra = _ra equ 5 ; line_number = 236 ; bind _ra5 = _porta@5 _ra5___byte equ _porta _ra5___bit equ 5 ; line_number = 237 ; bind _ra4 = _porta@4 _ra4___byte equ _porta _ra4___bit equ 4 ; line_number = 238 ; bind _ra3 = _porta@3 _ra3___byte equ _porta _ra3___bit equ 3 ; line_number = 239 ; bind _ra2 = _porta@2 _ra2___byte equ _porta _ra2___bit equ 2 ; line_number = 240 ; bind _ra1 = _porta@1 _ra1___byte equ _porta _ra1___bit equ 1 ; line_number = 241 ; bind _ra0 = _porta@0 _ra0___byte equ _porta _ra0___bit equ 0 ; line_number = 243 ; register _portc = _portc equ 7 ; line_number = 244 ; register _rc = _rc equ 7 ; line_number = 245 ; bind _rc5 = _portc@5 _rc5___byte equ _portc _rc5___bit equ 5 ; line_number = 246 ; bind _rc4 = _portc@4 _rc4___byte equ _portc _rc4___bit equ 4 ; line_number = 247 ; bind _rc3 = _portc@3 _rc3___byte equ _portc _rc3___bit equ 3 ; line_number = 248 ; bind _rc2 = _portc@2 _rc2___byte equ _portc _rc2___bit equ 2 ; line_number = 249 ; bind _rc1 = _portc@1 _rc1___byte equ _portc _rc1___bit equ 1 ; line_number = 250 ; bind _rc0 = _portc@0 _rc0___byte equ _portc _rc0___bit equ 0 ; line_number = 252 ; register _pclath = _pclath equ 10 ; line_number = 254 ; register _intcon = _intcon equ 11 ; line_number = 255 ; bind _gie = _intcon@7 _gie___byte equ _intcon _gie___bit equ 7 ; line_number = 256 ; bind _peie = _intcon@6 _peie___byte equ _intcon _peie___bit equ 6 ; line_number = 257 ; bind _t0ie = _intcon@5 _t0ie___byte equ _intcon _t0ie___bit equ 5 ; line_number = 258 ; bind _inte = _intcon@4 _inte___byte equ _intcon _inte___bit equ 4 ; line_number = 259 ; bind _raie = _intcon@3 _raie___byte equ _intcon _raie___bit equ 3 ; line_number = 260 ; bind _t0if = _intcon@2 _t0if___byte equ _intcon _t0if___bit equ 2 ; line_number = 261 ; bind _intf = _intcon@1 _intf___byte equ _intcon _intf___bit equ 1 ; line_number = 262 ; bind _raif = _intcon@0 _raif___byte equ _intcon _raif___bit equ 0 ; line_number = 264 ; register _pir1 = _pir1 equ 12 ; line_number = 265 ; bind _eeif = _pir1@7 _eeif___byte equ _pir1 _eeif___bit equ 7 ; line_number = 266 ; bind _adif = _pir1@6 _adif___byte equ _pir1 _adif___bit equ 6 ; line_number = 267 ; bind _rcif = _pir1@5 _rcif___byte equ _pir1 _rcif___bit equ 5 ; line_number = 268 ; bind _c2if = _pir1@4 _c2if___byte equ _pir1 _c2if___bit equ 4 ; line_number = 269 ; bind _c1if = _pir1@3 _c1if___byte equ _pir1 _c1if___bit equ 3 ; line_number = 270 ; bind _osfif = _pir1@2 _osfif___byte equ _pir1 _osfif___bit equ 2 ; line_number = 271 ; bind _txif = _pir1@1 _txif___byte equ _pir1 _txif___bit equ 1 ; line_number = 272 ; bind _tmr1if = _pir1@0 _tmr1if___byte equ _pir1 _tmr1if___bit equ 0 ; line_number = 274 ; register _tmr1l = _tmr1l equ 14 ; line_number = 276 ; register _tmr1h = _tmr1h equ 15 ; line_number = 278 ; register _t1con = _t1con equ 16 ; line_number = 279 ; bind t1ginv = _t1con@7 t1ginv___byte equ _t1con t1ginv___bit equ 7 ; line_number = 280 ; bind _tmr1ge = _t1con@6 _tmr1ge___byte equ _t1con _tmr1ge___bit equ 6 ; line_number = 281 ; bind _t1ckps1 = _t1con@5 _t1ckps1___byte equ _t1con _t1ckps1___bit equ 5 ; line_number = 282 ; bind _t1ckps0 = _t1con@4 _t1ckps0___byte equ _t1con _t1ckps0___bit equ 4 ; line_number = 283 ; bind _t1oscen = _t1con@3 _t1oscen___byte equ _t1con _t1oscen___bit equ 3 ; line_number = 284 ; bind _t1sync = _t1con@2 _t1sync___byte equ _t1con _t1sync___bit equ 2 ; line_number = 285 ; bind _tmr1cs = _t1con@1 _tmr1cs___byte equ _t1con _tmr1cs___bit equ 1 ; line_number = 286 ; bind _tmr1on = _t1con@0 _tmr1on___byte equ _t1con _tmr1on___bit equ 0 ; line_number = 288 ; register _baudctl = _baudctl equ 17 ; line_number = 289 ; bind _abdovf = _baudctl@7 _abdovf___byte equ _baudctl _abdovf___bit equ 7 ; line_number = 290 ; bind _rcidl = _baudctl@6 _rcidl___byte equ _baudctl _rcidl___bit equ 6 ; line_number = 291 ; bind _sckp = _baudctl@4 _sckp___byte equ _baudctl _sckp___bit equ 4 ; line_number = 292 ; bind _brg16 = _baudctl@3 _brg16___byte equ _baudctl _brg16___bit equ 3 ; line_number = 293 ; bind _wue = _baudctl@1 _wue___byte equ _baudctl _wue___bit equ 1 ; line_number = 294 ; bind _abden = _baudctl@0 _abden___byte equ _baudctl _abden___bit equ 0 ; line_number = 296 ; register _spbrgh = _spbrgh equ 18 ; line_number = 298 ; register _spbrg = _spbrg equ 19 ; line_number = 300 ; register _rcreg = _rcreg equ 20 ; line_number = 302 ; register _txreg = _txreg equ 21 ; line_number = 304 ; register _txsta = _txsta equ 22 ; line_number = 305 ; bind _csrc = _txsta@7 _csrc___byte equ _txsta _csrc___bit equ 7 ; line_number = 306 ; bind _tx9 = _txsta@6 _tx9___byte equ _txsta _tx9___bit equ 6 ; line_number = 307 ; bind _txen = _txsta@5 _txen___byte equ _txsta _txen___bit equ 5 ; line_number = 308 ; bind _sync = _txsta@4 _sync___byte equ _txsta _sync___bit equ 4 ; line_number = 309 ; bind _sendb = _txsta@3 _sendb___byte equ _txsta _sendb___bit equ 3 ; line_number = 310 ; bind _brgh = _txsta@2 _brgh___byte equ _txsta _brgh___bit equ 2 ; line_number = 311 ; bind _trmt = _txsta@1 _trmt___byte equ _txsta _trmt___bit equ 1 ; line_number = 312 ; bind _tx9d = _txsta@0 _tx9d___byte equ _txsta _tx9d___bit equ 0 ; line_number = 314 ; register _rcsta = _rcsta equ 23 ; line_number = 315 ; bind _spen = _rcsta@7 _spen___byte equ _rcsta _spen___bit equ 7 ; line_number = 316 ; bind _rx9 = _rcsta@6 _rx9___byte equ _rcsta _rx9___bit equ 6 ; line_number = 317 ; bind _sren = _rcsta@5 _sren___byte equ _rcsta _sren___bit equ 5 ; line_number = 318 ; bind _cren = _rcsta@4 _cren___byte equ _rcsta _cren___bit equ 4 ; line_number = 319 ; bind _adden = _rcsta@3 _adden___byte equ _rcsta _adden___bit equ 3 ; line_number = 320 ; bind _ferr = _rcsta@2 _ferr___byte equ _rcsta _ferr___bit equ 2 ; line_number = 321 ; bind _oerr = _rcsta@1 _oerr___byte equ _rcsta _oerr___bit equ 1 ; line_number = 322 ; bind _rx9d = _rcsta@0 _rx9d___byte equ _rcsta _rx9d___bit equ 0 ; line_number = 324 ; register _wdtcon = _wdtcon equ 24 ; line_number = 325 ; bind _wdtps3 = _wdtcon@4 _wdtps3___byte equ _wdtcon _wdtps3___bit equ 4 ; line_number = 326 ; bind _wdtps2 = _wdtcon@3 _wdtps2___byte equ _wdtcon _wdtps2___bit equ 3 ; line_number = 327 ; bind _wdtps1 = _wdtcon@2 _wdtps1___byte equ _wdtcon _wdtps1___bit equ 2 ; line_number = 328 ; bind _wdtps0 = _wdtcon@1 _wdtps0___byte equ _wdtcon _wdtps0___bit equ 1 ; line_number = 329 ; bind _swdten = _wdtcon@0 _swdten___byte equ _wdtcon _swdten___bit equ 0 ; line_number = 331 ; register _cmcon0 = _cmcon0 equ 25 ; line_number = 332 ; bind _c1out = _cmcon0@7 _c1out___byte equ _cmcon0 _c1out___bit equ 7 ; line_number = 333 ; bind _c2out = _cmcon0@6 _c2out___byte equ _cmcon0 _c2out___bit equ 6 ; line_number = 334 ; bind _c1inv = _cmcon0@5 _c1inv___byte equ _cmcon0 _c1inv___bit equ 5 ; line_number = 335 ; bind _c2inv = _cmcon0@4 _c2inv___byte equ _cmcon0 _c2inv___bit equ 4 ; line_number = 336 ; bind _cis = _cmcon0@3 _cis___byte equ _cmcon0 _cis___bit equ 3 ; line_number = 337 ; bind _cm2 = _cmcon0@2 _cm2___byte equ _cmcon0 _cm2___bit equ 2 ; line_number = 338 ; bind _cm1 = _cmcon0@1 _cm1___byte equ _cmcon0 _cm1___bit equ 1 ; line_number = 339 ; bind _cm0 = _cmcon0@0 _cm0___byte equ _cmcon0 _cm0___bit equ 0 ; line_number = 341 ; register _cmcon1 = _cmcon1 equ 26 ; line_number = 342 ; bind _t1gss = _cmcon1@0 _t1gss___byte equ _cmcon1 _t1gss___bit equ 0 ; line_number = 343 ; bind _c2sync = _cmcon1@1 _c2sync___byte equ _cmcon1 _c2sync___bit equ 1 ; line_number = 345 ; register _adresh = _adresh equ 30 ; line_number = 347 ; register _adcon0 = _adcon0 equ 31 ; line_number = 348 ; bind _adfm = _adcon0@7 _adfm___byte equ _adcon0 _adfm___bit equ 7 ; line_number = 349 ; bind _vcfg = _adcon0@6 _vcfg___byte equ _adcon0 _vcfg___bit equ 6 ; line_number = 350 ; bind _chs2 = _adcon0@4 _chs2___byte equ _adcon0 _chs2___bit equ 4 ; line_number = 351 ; bind _chs1 = _adcon0@3 _chs1___byte equ _adcon0 _chs1___bit equ 3 ; line_number = 352 ; bind _chs0 = _adcon0@2 _chs0___byte equ _adcon0 _chs0___bit equ 2 ; line_number = 353 ; bind _go = _adcon0@1 _go___byte equ _adcon0 _go___bit equ 1 ; line_number = 354 ; bind _adon = _adcon0@0 _adon___byte equ _adcon0 _adon___bit equ 0 ; # Data bank 1 (0x80-0xff): ; line_number = 358 ; register _option_reg = _option_reg equ 129 ; line_number = 359 ; bind _rapu = _option_reg@7 _rapu___byte equ _option_reg _rapu___bit equ 7 ; line_number = 360 ; bind _intedg = _option_reg@6 _intedg___byte equ _option_reg _intedg___bit equ 6 ; line_number = 361 ; bind _t0cs = _option_reg@5 _t0cs___byte equ _option_reg _t0cs___bit equ 5 ; line_number = 362 ; bind _t0se = _option_reg@4 _t0se___byte equ _option_reg _t0se___bit equ 4 ; line_number = 363 ; bind _psa = _option_reg@3 _psa___byte equ _option_reg _psa___bit equ 3 ; line_number = 364 ; bind _ps2 = _option_reg@2 _ps2___byte equ _option_reg _ps2___bit equ 2 ; line_number = 365 ; bind _ps1 = _option_reg@1 _ps1___byte equ _option_reg _ps1___bit equ 1 ; line_number = 366 ; bind _ps0 = _option_reg@0 _ps0___byte equ _option_reg _ps0___bit equ 0 ; line_number = 368 ; register _trisa = _trisa equ 133 ; line_number = 369 ; bind _trisa5 = _trisa@5 _trisa5___byte equ _trisa _trisa5___bit equ 5 ; line_number = 370 ; bind _trisa4 = _trisa@4 _trisa4___byte equ _trisa _trisa4___bit equ 4 ; line_number = 371 ; bind _trisa3 = _trisa@3 _trisa3___byte equ _trisa _trisa3___bit equ 3 ; line_number = 372 ; bind _trisa2 = _trisa@2 _trisa2___byte equ _trisa _trisa2___bit equ 2 ; line_number = 373 ; bind _trisa1 = _trisa@1 _trisa1___byte equ _trisa _trisa1___bit equ 1 ; line_number = 374 ; bind _trisa0 = _trisa@0 _trisa0___byte equ _trisa _trisa0___bit equ 0 ; line_number = 376 ; register _trisc = _trisc equ 135 ; line_number = 377 ; bind _trisc5 = _trisc@5 _trisc5___byte equ _trisc _trisc5___bit equ 5 ; line_number = 378 ; bind _trisc4 = _trisc@4 _trisc4___byte equ _trisc _trisc4___bit equ 4 ; line_number = 379 ; bind _trisc3 = _trisc@3 _trisc3___byte equ _trisc _trisc3___bit equ 3 ; line_number = 380 ; bind _trisc2 = _trisc@2 _trisc2___byte equ _trisc _trisc2___bit equ 2 ; line_number = 381 ; bind _trisc1 = _trisc@1 _trisc1___byte equ _trisc _trisc1___bit equ 1 ; line_number = 382 ; bind _trisc0 = _trisc@0 _trisc0___byte equ _trisc _trisc0___bit equ 0 ; line_number = 384 ; register _pie1 = _pie1 equ 140 ; line_number = 385 ; bind _eeie = _pie1@7 _eeie___byte equ _pie1 _eeie___bit equ 7 ; line_number = 386 ; bind _adie = _pie1@6 _adie___byte equ _pie1 _adie___bit equ 6 ; line_number = 387 ; bind _rcie = _pie1@5 _rcie___byte equ _pie1 _rcie___bit equ 5 ; line_number = 388 ; bind _c2ie = _pie1@4 _c2ie___byte equ _pie1 _c2ie___bit equ 4 ; line_number = 389 ; bind _c1ie = _pie1@3 _c1ie___byte equ _pie1 _c1ie___bit equ 3 ; line_number = 390 ; bind _osfie = _pie1@2 _osfie___byte equ _pie1 _osfie___bit equ 2 ; line_number = 391 ; bind _txie = _pie1@1 _txie___byte equ _pie1 _txie___bit equ 1 ; line_number = 392 ; bind _tmr1ie = _pie1@0 _tmr1ie___byte equ _pie1 _tmr1ie___bit equ 0 ; line_number = 394 ; register _pcon = _pcon equ 142 ; line_number = 395 ; bind _ulpwue = _pcon@5 _ulpwue___byte equ _pcon _ulpwue___bit equ 5 ; line_number = 396 ; bind _sboden = _pcon@4 _sboden___byte equ _pcon _sboden___bit equ 4 ; line_number = 397 ; bind _por = _pcon@1 _por___byte equ _pcon _por___bit equ 1 ; line_number = 398 ; bind _bod = _pcon@0 _bod___byte equ _pcon _bod___bit equ 0 ; line_number = 400 ; register _osccon = _osccon equ 143 ; line_number = 401 ; bind _ircf2 = _osccon@6 _ircf2___byte equ _osccon _ircf2___bit equ 6 ; line_number = 402 ; bind _ircf1 = _osccon@5 _ircf1___byte equ _osccon _ircf1___bit equ 5 ; line_number = 403 ; bind _ircf0 = _osccon@4 _ircf0___byte equ _osccon _ircf0___bit equ 4 ; line_number = 404 ; bind _osts = _osccon@3 _osts___byte equ _osccon _osts___bit equ 3 ; line_number = 405 ; bind _hts = _osccon@2 _hts___byte equ _osccon _hts___bit equ 2 ; line_number = 406 ; bind _lts = _osccon@3 _lts___byte equ _osccon _lts___bit equ 3 ; line_number = 407 ; bind _scs = _osccon@2 _scs___byte equ _osccon _scs___bit equ 2 ; line_number = 409 ; register _osctune = _osctune equ 144 ; line_number = 410 ; bind _tun4 = _osctune@4 _tun4___byte equ _osctune _tun4___bit equ 4 ; line_number = 411 ; bind _tun3 = _osctune@3 _tun3___byte equ _osctune _tun3___bit equ 3 ; line_number = 412 ; bind _tun2 = _osctune@2 _tun2___byte equ _osctune _tun2___bit equ 2 ; line_number = 413 ; bind _tun1 = _osctune@1 _tun1___byte equ _osctune _tun1___bit equ 1 ; line_number = 414 ; bind _tun0 = _osctune@0 _tun0___byte equ _osctune _tun0___bit equ 0 ; line_number = 415 ; constant _osccal_lsb = 1 _osccal_lsb equ 1 ; line_number = 417 ; register _ansel = _ansel equ 145 ; line_number = 418 ; bind _ans7 = _ansel@7 _ans7___byte equ _ansel _ans7___bit equ 7 ; line_number = 419 ; bind _ans6 = _ansel@6 _ans6___byte equ _ansel _ans6___bit equ 6 ; line_number = 420 ; bind _ans5 = _ansel@5 _ans5___byte equ _ansel _ans5___bit equ 5 ; line_number = 421 ; bind _ans4 = _ansel@4 _ans4___byte equ _ansel _ans4___bit equ 4 ; line_number = 422 ; bind _ans3 = _ansel@3 _ans3___byte equ _ansel _ans3___bit equ 3 ; line_number = 423 ; bind _ans2 = _ansel@2 _ans2___byte equ _ansel _ans2___bit equ 2 ; line_number = 424 ; bind _ans1 = _ansel@1 _ans1___byte equ _ansel _ans1___bit equ 1 ; line_number = 425 ; bind _ans0 = _ansel@0 _ans0___byte equ _ansel _ans0___bit equ 0 ; line_number = 427 ; register _wpua = _wpua equ 149 ; line_number = 428 ; bind _wpua5 = _wpua@5 _wpua5___byte equ _wpua _wpua5___bit equ 5 ; line_number = 429 ; bind _wpua4 = _wpua@4 _wpua4___byte equ _wpua _wpua4___bit equ 4 ; line_number = 430 ; bind _wpua2 = _wpua@2 _wpua2___byte equ _wpua _wpua2___bit equ 2 ; line_number = 431 ; bind _wpua1 = _wpua@1 _wpua1___byte equ _wpua _wpua1___bit equ 1 ; line_number = 432 ; bind _wpua0 = _wpua@0 _wpua0___byte equ _wpua _wpua0___bit equ 0 ; line_number = 434 ; register _ioca = _ioca equ 150 ; line_number = 435 ; bind _ioca5 = _ioca@5 _ioca5___byte equ _ioca _ioca5___bit equ 5 ; line_number = 436 ; bind _ioca4 = _ioca@4 _ioca4___byte equ _ioca _ioca4___bit equ 4 ; line_number = 437 ; bind _ioca3 = _ioca@3 _ioca3___byte equ _ioca _ioca3___bit equ 3 ; line_number = 438 ; bind _ioca2 = _ioca@2 _ioca2___byte equ _ioca _ioca2___bit equ 2 ; line_number = 439 ; bind _ioca1 = _ioca@1 _ioca1___byte equ _ioca _ioca1___bit equ 1 ; line_number = 440 ; bind _ioca0 = _ioca@0 _ioca0___byte equ _ioca _ioca0___bit equ 0 ; line_number = 442 ; register _eedath = _eedath equ 151 ; line_number = 444 ; register _eeadrh = _eeadrh equ 152 ; line_number = 446 ; register _vrcon = _vrcon equ 153 ; line_number = 447 ; bind _vren = _vrcon@7 _vren___byte equ _vrcon _vren___bit equ 7 ; line_number = 448 ; bind _vrr = _vrcon@5 _vrr___byte equ _vrcon _vrr___bit equ 5 ; line_number = 449 ; bind _vr3 = _vrcon@3 _vr3___byte equ _vrcon _vr3___bit equ 3 ; line_number = 450 ; bind _vr2 = _vrcon@2 _vr2___byte equ _vrcon _vr2___bit equ 2 ; line_number = 451 ; bind _vr1 = _vrcon@1 _vr1___byte equ _vrcon _vr1___bit equ 1 ; line_number = 452 ; bind _vr0 = _vrcon@0 _vr0___byte equ _vrcon _vr0___bit equ 0 ; line_number = 454 ; register _eedat = _eedat equ 154 ; line_number = 455 ; bind _eedat7 = _eedat@7 _eedat7___byte equ _eedat _eedat7___bit equ 7 ; line_number = 456 ; bind _eedat6 = _eedat@6 _eedat6___byte equ _eedat _eedat6___bit equ 6 ; line_number = 457 ; bind _eedat5 = _eedat@5 _eedat5___byte equ _eedat _eedat5___bit equ 5 ; line_number = 458 ; bind _eedat4 = _eedat@4 _eedat4___byte equ _eedat _eedat4___bit equ 4 ; line_number = 459 ; bind _eedat3 = _eedat@3 _eedat3___byte equ _eedat _eedat3___bit equ 3 ; line_number = 460 ; bind _eedat2 = _eedat@2 _eedat2___byte equ _eedat _eedat2___bit equ 2 ; line_number = 461 ; bind _eedat1 = _eedat@1 _eedat1___byte equ _eedat _eedat1___bit equ 1 ; line_number = 462 ; bind _eedat0 = _eedat@0 _eedat0___byte equ _eedat _eedat0___bit equ 0 ; line_number = 464 ; register _eeadr = _eeadr equ 155 ; line_number = 465 ; bind _eeadr7 = _eeadr@7 _eeadr7___byte equ _eeadr _eeadr7___bit equ 7 ; line_number = 466 ; bind _eeadr6 = _eeadr@6 _eeadr6___byte equ _eeadr _eeadr6___bit equ 6 ; line_number = 467 ; bind _eeadr5 = _eeadr@5 _eeadr5___byte equ _eeadr _eeadr5___bit equ 5 ; line_number = 468 ; bind _eeadr4 = _eeadr@4 _eeadr4___byte equ _eeadr _eeadr4___bit equ 4 ; line_number = 469 ; bind _eeadr3 = _eeadr@3 _eeadr3___byte equ _eeadr _eeadr3___bit equ 3 ; line_number = 470 ; bind _eeadr2 = _eeadr@2 _eeadr2___byte equ _eeadr _eeadr2___bit equ 2 ; line_number = 471 ; bind _eeadr1 = _eeadr@1 _eeadr1___byte equ _eeadr _eeadr1___bit equ 1 ; line_number = 472 ; bind _eeadr0 = _eeadr@0 _eeadr0___byte equ _eeadr _eeadr0___bit equ 0 ; line_number = 474 ; register _eecon1 = _eecon1 equ 156 ; line_number = 475 ; bind _eepgd = _eecon1@7 _eepgd___byte equ _eecon1 _eepgd___bit equ 7 ; line_number = 476 ; bind _wrerr = _eecon1@3 _wrerr___byte equ _eecon1 _wrerr___bit equ 3 ; line_number = 477 ; bind _wren = _eecon1@2 _wren___byte equ _eecon1 _wren___bit equ 2 ; line_number = 478 ; bind _wr = _eecon1@1 _wr___byte equ _eecon1 _wr___bit equ 1 ; line_number = 479 ; bind _rd = _eecon1@0 _rd___byte equ _eecon1 _rd___bit equ 0 ; line_number = 481 ; register _eecon2 = _eecon2 equ 157 ; line_number = 483 ; register _adresl = _adresl equ 158 ; line_number = 485 ; register _adcon1 = _adcon1 equ 159 ; line_number = 486 ; bind _adcs2 = _adcon1@6 _adcs2___byte equ _adcon1 _adcs2___bit equ 6 ; line_number = 487 ; bind _adcs1 = _adcon1@5 _adcs1___byte equ _adcon1 _adcs1___bit equ 5 ; line_number = 488 ; bind _adcs0 = _adcon1@4 _adcs0___byte equ _adcon1 _adcs0___bit equ 4 ; # Data Bank 2 (0x100 - 0x17f): ; buffer = 'midimotor2' ; line_number = 6 ; library _pic16f688 exited ; line_number = 7 ; library clock20mhz entered ; # Copyright (c) 2004 by Wayne C. Gramlich ; # All rights reserved. ; # This library defines the contstants {clock_rate}, {instruction_rate}, ; # and {clocks_per_instruction}. ; # Define processor constants: ; buffer = 'clock20mhz' ; line_number = 9 ; constant clock_rate = 20000000 clock_rate equ 20000000 ; line_number = 10 ; constant clocks_per_instruction = 4 clocks_per_instruction equ 4 ; line_number = 11 ; constant instruction_rate = clock_rate / clocks_per_instruction instruction_rate equ 5000000 ; buffer = 'midimotor2' ; line_number = 7 ; library clock20mhz exited ; line_number = 8 ; library _uart entered ; # Copyright (c) 2004 by Wayne C. Gramlich. ; # All rights reserved. ; # This library contains some procedures for accessing the UART. ; Delaying code generation for procedure _uart_byte_safe_get ; Delaying code generation for procedure _uart_byte_get ; Delaying code generation for procedure _uart_hex_put ; Delaying code generation for procedure _uart_nibble_put ; Delaying code generation for procedure _uart_space_put ; Delaying code generation for procedure _uart_crlf_put ; Delaying code generation for procedure _uart_byte_put ; line_number = 8 ; library _uart exited ; line_number = 9 ; constant _eusart_clock = clock_rate _eusart_clock equ 20000000 ; line_number = 10 ; constant _eusart_factor = 4 _eusart_factor equ 4 ; line_number = 11 ; library _eusart entered ; # Copyright (c) 2005 by Wayne C. Gramlich ; # All rights reserved. ; # This library contains a bunch of definitions for the Enhanced Universal ; # Asynchronous Serial Receiver/Transmitter (EUSART) that is available ; # on many of the PIC microcontrollers. ; # In order to use this module you have to get two constants defined ; # BEFORE including this library -- {_eusart_factor} and {_eusart_clock}. ; # {_eusart_clock} should be set to the frequency oscillator for the chip. ; # {_eusart_factor} should be set to 4, 16, or 64 depending upon whether ; # the {_brg16} and {_brgh} bits are set. Use the table below to select: ; # ; # _{brg16} {_brgh} _{eusart_factor} ; # 0 0 64 ; # 0 1 16 ; # 1 0 16 ; # 1 1 4 ; # 2400 baud: ; buffer = '_eusart' ; line_number = 23 ; constant _eusart_2400 = (_eusart_clock / (2400 * _eusart_factor)) - 1 _eusart_2400 equ 2082 ; line_number = 24 ; constant _eusart_2400_low = _eusart_2400 & 0xff _eusart_2400_low equ 34 ; line_number = 25 ; constant _eusart_2400_high = _eusart_2400 >> 8 _eusart_2400_high equ 8 ; line_number = 26 ; constant _eusart_2400_index = 0 _eusart_2400_index equ 0 ; # 4800 baud: ; line_number = 28 ; constant _eusart_4800 = (_eusart_clock / (4800 * _eusart_factor)) - 1 _eusart_4800 equ 1040 ; line_number = 29 ; constant _eusart_4800_low = _eusart_4800 & 0xff _eusart_4800_low equ 16 ; line_number = 30 ; constant _eusart_4800_high = _eusart_4800 >> 8 _eusart_4800_high equ 4 ; line_number = 31 ; constant _eusart_4800_index = 1 _eusart_4800_index equ 1 ; # 9600 baud: ; line_number = 33 ; constant _eusart_9600 = (_eusart_clock / (9600 * _eusart_factor)) - 1 _eusart_9600 equ 519 ; line_number = 34 ; constant _eusart_9600_low = _eusart_9600 & 0xff _eusart_9600_low equ 7 ; line_number = 35 ; constant _eusart_9600_high = _eusart_9600 >> 8 _eusart_9600_high equ 2 ; line_number = 36 ; constant _eusart_9600_index = 2 _eusart_9600_index equ 2 ; # 19200 baud: ; line_number = 38 ; constant _eusart_19200 = (_eusart_clock / (19200 * _eusart_factor)) - 1 _eusart_19200 equ 259 ; line_number = 39 ; constant _eusart_19200_low = _eusart_19200 & 0xff _eusart_19200_low equ 3 ; line_number = 40 ; constant _eusart_19200_high = _eusart_19200 >> 8 _eusart_19200_high equ 1 ; line_number = 41 ; constant _eusart_19200_index = 3 _eusart_19200_index equ 3 ; # 38400 baud: ; line_number = 43 ; constant _eusart_38400 = (_eusart_clock / (38400 * _eusart_factor)) - 1 _eusart_38400 equ 129 ; line_number = 44 ; constant _eusart_38400_low = _eusart_38400 & 0xff _eusart_38400_low equ 129 ; line_number = 45 ; constant _eusart_38400_high = _eusart_38400 >> 8 _eusart_38400_high equ 0 ; line_number = 46 ; constant _eusart_38400_index = 4 _eusart_38400_index equ 4 ; # 57600 baud: ; line_number = 48 ; constant _eusart_57600 = (_eusart_clock / (57600 * _eusart_factor)) - 1 _eusart_57600 equ 85 ; line_number = 49 ; constant _eusart_57600_low = _eusart_57600 & 0xff _eusart_57600_low equ 85 ; line_number = 50 ; constant _eusart_57600_high = _eusart_57600 >> 8 _eusart_57600_high equ 0 ; line_number = 51 ; constant _eusart_57600_index = 5 _eusart_57600_index equ 5 ; # 115200 baud: ; line_number = 53 ; constant _eusart_115200 = (_eusart_clock / (115200 * _eusart_factor)) - 1 _eusart_115200 equ 42 ; line_number = 54 ; constant _eusart_115200_low = _eusart_115200 & 0xff _eusart_115200_low equ 42 ; line_number = 55 ; constant _eusart_115200_high = _eusart_115200 >> 8 _eusart_115200_high equ 0 ; line_number = 56 ; constant _eusart_115200_index = 6 _eusart_115200_index equ 6 ; # 203400 baud: ; line_number = 58 ; constant _eusart_230400 = (_eusart_clock / (230400 * _eusart_factor)) - 1 _eusart_230400 equ 20 ; line_number = 59 ; constant _eusart_230400_low = _eusart_230400 & 0xff _eusart_230400_low equ 20 ; line_number = 60 ; constant _eusart_230400_high = _eusart_230400 >> 8 _eusart_230400_high equ 0 ; line_number = 61 ; constant _eusart_230400_index = 7 _eusart_230400_index equ 7 ; # 406800 baud: ; line_number = 63 ; constant _eusart_406800 = (_eusart_clock / (406800 * _eusart_factor)) - 1 _eusart_406800 equ 11 ; line_number = 64 ; constant _eusart_406800_low = _eusart_406800 & 0xff _eusart_406800_low equ 11 ; line_number = 65 ; constant _eusart_406800_high = _eusart_406800 >> 8 _eusart_406800_high equ 0 ; line_number = 66 ; constant _eusart_406800_index = 8 _eusart_406800_index equ 8 ; # 500000 baud: ; line_number = 68 ; constant _eusart_500000 = (_eusart_clock / (500000 * _eusart_factor)) - 1 _eusart_500000 equ 9 ; line_number = 69 ; constant _eusart_500000_low = _eusart_500000 & 0xff _eusart_500000_low equ 9 ; line_number = 70 ; constant _eusart_500000_high = _eusart_500000 >> 8 _eusart_500000_high equ 0 ; line_number = 71 ; constant _eusart_500000_index = 8 _eusart_500000_index equ 8 ; # 62500 baud: ; line_number = 73 ; constant _eusart_625000 = (_eusart_clock / (625000 * _eusart_factor)) - 1 _eusart_625000 equ 7 ; line_number = 74 ; constant _eusart_625000_low = _eusart_625000 & 0xff _eusart_625000_low equ 7 ; line_number = 75 ; constant _eusart_625000_high = _eusart_625000 >> 8 _eusart_625000_high equ 0 ; line_number = 76 ; constant _eusart_625000_index = 9 _eusart_625000_index equ 9 ; # 833333 baud: ; line_number = 78 ; constant _eusart_833333 = (_eusart_clock / (833333 * _eusart_factor)) - 1 _eusart_833333 equ 5 ; line_number = 79 ; constant _eusart_833333_low = _eusart_833333 & 0xff _eusart_833333_low equ 5 ; line_number = 80 ; constant _eusart_833333_high = _eusart_833333 >> 8 _eusart_833333_high equ 0 ; line_number = 81 ; constant _eusart_833333_index = 10 _eusart_833333_index equ 10 ; # 1000000 baud (1MHz): ; line_number = 83 ; constant _eusart_1000000 = (_eusart_clock / (1000000 * _eusart_factor)) - 1 _eusart_1000000 equ 4 ; line_number = 84 ; constant _eusart_1000000_low = _eusart_1000000 & 0xff _eusart_1000000_low equ 4 ; line_number = 85 ; constant _eusart_1000000_high = _eusart_1000000 >> 8 _eusart_1000000_high equ 0 ; line_number = 86 ; constant _eusart_1000000_index = 11 _eusart_1000000_index equ 11 ; buffer = 'midimotor2' ; line_number = 11 ; library _eusart exited ; line_number = 15 ; package pdip ; line_number = 16 ; pin 1 = power_supply ; line_number = 17 ; pin 2 = osc1 ; line_number = 18 ; pin 3 = ra4_in, name=io1, mask=io1_mask, bit=io1_bit io1___byte equ _porta io1___bit equ 4 io1_mask equ 16 io1_bit equ 4 ; line_number = 19 ; pin 4 = ra3_nc, name=nc1 nc1___byte equ _porta nc1___bit equ 3 ; line_number = 20 ; pin 5 = rx, name=rx, bit=rx_bit rx___byte equ _portc rx___bit equ 5 rx_bit equ 5 ; line_number = 21 ; pin 6 = tx, name=tx, bit=tx_bit tx___byte equ _portc tx___bit equ 4 tx_bit equ 4 ; line_number = 22 ; pin 7 = rc3_in, name=io7, mask=io7_mask, bit=io7_bit io7___byte equ _portc io7___bit equ 3 io7_mask equ 8 io7_bit equ 3 ; line_number = 23 ; pin 8 = rc2_in, name=io6, mask=io6_mask, bit=io6_bit io6___byte equ _portc io6___bit equ 2 io6_mask equ 4 io6_bit equ 2 ; line_number = 24 ; pin 9 = rc1_in, name=io5, mask=io5_mask, bit=io5_bit io5___byte equ _portc io5___bit equ 1 io5_mask equ 2 io5_bit equ 1 ; line_number = 25 ; pin 10 = rc0_in, name=io4, mask=io4_mask, bit=io4_bit io4___byte equ _portc io4___bit equ 0 io4_mask equ 1 io4_bit equ 0 ; line_number = 26 ; pin 11 = ra2_in, name=io3, mask=io3_mask, bit=io3_bit io3___byte equ _porta io3___bit equ 2 io3_mask equ 4 io3_bit equ 2 ; line_number = 27 ; pin 12 = ra1_in, name=io2, mask=io2_mask, bit=io2_bit io2___byte equ _porta io2___bit equ 1 io2_mask equ 2 io2_bit equ 1 ; line_number = 28 ; pin 13 = ra0_in, name=io0, mask=io0_mask, bit=io0_bit io0___byte equ _porta io0___bit equ 0 io0_mask equ 1 io0_bit equ 0 ; line_number = 29 ; pin 14 = ground ; line_number = 31 ; global module_address byte module_address equ globals___0+3 ; line_number = 32 ; global echo_discard bit echo_discard___byte equ globals___0+79 echo_discard___bit equ 0 ; line_number = 33 ; global rx9d bit rx9d___byte equ globals___0+79 rx9d___bit equ 1 ; line_number = 34 ; global id_index byte id_index equ globals___0+4 ; line_number = 36 ; origin 0 org 0 ; line_number = 38 ;info 38, 0 ; procedure main main: ; Initialize some registers clrf _adcon0 bsf __rp0___byte, __rp0___bit clrf _ansel movlw 7 bcf __rp0___byte, __rp0___bit movwf _cmcon0 movlw 63 bsf __rp0___byte, __rp0___bit movwf _trisa movlw 63 movwf _trisc ; arguments_none ; line_number = 40 ; returns_nothing ; line_number = 42 ; local command byte main__command equ globals___0+5 ; line_number = 43 ; local transmit bit main__transmit___byte equ globals___0+79 main__transmit___bit equ 2 ; line_number = 44 ; local result byte main__result equ globals___0+6 ; line_number = 45 ; local mode byte main__mode equ globals___0+7 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>01 code:XX=cc=>XX) ; line_number = 47 ; module_address := 2 ;info 47, 11 movlw 2 bcf __rp0___byte, __rp0___bit movwf module_address ; line_number = 48 ; echo_discard := _true ;info 48, 14 bsf echo_discard___byte, echo_discard___bit ; # Warm up the UART: ; line_number = 51 ; _trisc@5 := _true ;info 51, 15 main__select__1___byte equ _trisc main__select__1___bit equ 5 bsf __rp0___byte, __rp0___bit bsf main__select__1___byte, main__select__1___bit ; line_number = 52 ; _trisc@4 := _true ;info 52, 17 main__select__2___byte equ _trisc main__select__2___bit equ 4 bsf main__select__2___byte, main__select__2___bit ; line_number = 54 ; _txsta := 0 ;info 54, 18 bcf __rp0___byte, __rp0___bit clrf _txsta ; line_number = 55 ; _tx9 := _true ;info 55, 20 bsf _tx9___byte, _tx9___bit ; #_tx9 := _false ; line_number = 57 ; _txen := _true ;info 57, 21 bsf _txen___byte, _txen___bit ; line_number = 58 ; _brgh := _true ;info 58, 22 bsf _brgh___byte, _brgh___bit ; line_number = 60 ; _rcsta := 0 ;info 60, 23 clrf _rcsta ; line_number = 61 ; _spen := _true ;info 61, 24 bsf _spen___byte, _spen___bit ; line_number = 62 ; _rx9 := _true ;info 62, 25 bsf _rx9___byte, _rx9___bit ; #_rx9 := _false ; line_number = 64 ; _cren := _true ;info 64, 26 bsf _cren___byte, _cren___bit ; #_adden := _true ; line_number = 66 ; _adden := _false ;info 66, 27 bcf _adden___byte, _adden___bit ; line_number = 68 ; _baudctl := 0 ;info 68, 28 clrf _baudctl ; line_number = 69 ; _brg16 := _true ;info 69, 29 bsf _brg16___byte, _brg16___bit ; line_number = 70 ; mode := 0 ;info 70, 30 clrf main__mode ; line_number = 71 ; id_index := 0 ;info 71, 31 clrf id_index ; #_spbrg := _eusart_19200_low ; #_spbrgh := _eusart_19200_high ; #_spbrg := _eusart_115200_low ; #_spbrgh := _eusart_115200_high ; #_spbrg := _eusart_230400_low ; #_spbrgh := _eusart_230400_high ; #_spbrg := _eusart_406800_low ; #_spbrgh := _eusart_406800_high ; line_number = 81 ; _spbrg := _eusart_625000_low ;info 81, 32 movlw 7 movwf _spbrg ; line_number = 82 ; _spbrgh := _eusart_625000_high ;info 82, 34 clrf _spbrgh ; #_spbrg := _eusart_833333_low ; #_spbrgh := _eusart_833333_high ; line_number = 86 ; loop_forever start main__3: ; #command := _uart_byte_get() ; line_number = 88 ; transmit := _false ;info 88, 35 bcf main__transmit___byte, main__transmit___bit ; line_number = 89 ; rx9d := _false ;info 89, 36 bcf rx9d___byte, rx9d___bit ; line_number = 90 ; while !_rcif start main__4: ;info 90, 37 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; line_number = 91 ; do_nothing ;info 91, 38 goto main__4 ; Recombine size1 = 0 || size2 = 0 ; line_number = 90 ; while !_rcif done ; line_number = 92 ; if _rx9d start ;info 92, 39 ; =>bit_code_emit@symbol(): sym=_rx9d ; 1TEST: Single test with code in skip slot btfsc _rx9d___byte, _rx9d___bit ; line_number = 93 ; rx9d := _true ;info 93, 40 bsf rx9d___byte, rx9d___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 92 ; if _rx9d done ; line_number = 94 ; command := _rcreg ;info 94, 41 movf _rcreg,w movwf main__command ; line_number = 96 ; if rx9d start ;info 96, 43 ; =>bit_code_emit@symbol(): sym=rx9d ; No 1TEST: true.size=11 false.size=178 ; No 2TEST: true.size=11 false.size=178 ; 2GOTO: Single test with two GOTO's btfss rx9d___byte, rx9d___bit goto main__48 ; # We have an address bit: ; line_number = 98 ; if command = module_address start ;info 98, 45 ; Left minus Right movf module_address,w subwf main__command,w ; =>bit_code_emit@symbol(): sym=__z ; No 1TEST: true.size=4 false.size=1 ; No 2TEST: true.size=4 false.size=1 ; 2GOTO: Single test with two GOTO's btfss __z___byte, __z___bit goto main__46 ; # We have a match: ; line_number = 100 ; _adden := _false ;info 100, 49 bcf _adden___byte, _adden___bit ; line_number = 101 ; result := 0x5a ;info 101, 50 movlw 90 movwf main__result ; line_number = 102 ; transmit := _true ;info 102, 52 bsf main__transmit___byte, main__transmit___bit goto main__47 ; 2GOTO: Starting code 2 main__46: ; # We need to disable non-address reception: ; line_number = 105 ; _adden := _true ;info 105, 54 bsf _adden___byte, _adden___bit main__47: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 98 ; if command = module_address done ; line_number = 106 ; mode := 0 ;info 106, 55 clrf main__mode goto main__49 ; 2GOTO: Starting code 2 main__48: ; # We have a command: ; line_number = 109 ; switch mode start ;info 109, 57 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__44>>8 movwf __pclath movf main__mode,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__44 movwf __pcl ; page_group 4 main__44: goto main__40 goto main__41 goto main__42 goto main__43 ; line_number = 110 ; case 0 main__40: ; # Basic instruction decoding: ; line_number = 112 ; switch command >> 6 start ;info 112, 66 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__37>>8 movwf __pclath main__38 equ globals___0+22 swapf main__command,w movwf main__38 rrf main__38,f rrf main__38,w andlw 3 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__37 movwf __pcl ; page_group 4 main__37: goto main__35 goto main__39 goto main__39 goto main__36 ; line_number = 113 ; case 0 main__35: ; # 00xx xxxx: ; line_number = 115 ; switch (command >> 3) & 7 start ;info 115, 79 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 ; line_number = 116 ; case_maximum 7 movlw main__21>>8 movwf __pclath main__22 equ globals___0+22 rrf main__command,w movwf main__22 rrf main__22,f rrf main__22,w andlw 7 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__21 movwf __pcl ; page_group 8 main__21: goto main__16 goto main__23 goto main__17 goto main__18 goto main__19 goto main__19 goto main__20 goto main__20 ; line_number = 117 ; case 0 main__16: ; # 0000 0xxx: ; line_number = 119 ; switch command & 7 start ;info 119, 96 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 ; line_number = 147 ; case_maximum 7 movlw main__11>>8 movwf __pclath movlw 7 andwf main__command,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__11 movwf __pcl ; page_group 8 main__11: goto main__5 goto main__6 goto main__7 goto main__8 goto main__9 goto main__10 goto main__12 goto main__12 ; line_number = 120 ; case 0 main__5: ; # 0000 0000 (Digital8_Read): ; line_number = 122 ; result := digital_read() ;info 122, 110 call digital_read movwf main__result ; line_number = 123 ; transmit := _true ;info 123, 112 bsf main__transmit___byte, main__transmit___bit goto main__12 ; line_number = 124 ; case 1 main__6: ; # 0000 0001 (Digital8_Write): ; line_number = 126 ; result := digital_read() ;info 126, 114 call digital_read movwf main__result ; line_number = 127 ; transmit := _true ;info 127, 116 bsf main__transmit___byte, main__transmit___bit ; line_number = 128 ; mode := 1 ;info 128, 117 movlw 1 movwf main__mode goto main__12 ; line_number = 129 ; case 2 main__7: ; # 0000 0010 (Direction_Read): ; line_number = 131 ; result := direction_read() ;info 131, 120 call direction_read movwf main__result ; line_number = 132 ; transmit := _true ;info 132, 122 bsf main__transmit___byte, main__transmit___bit goto main__12 ; line_number = 133 ; case 3 main__8: ; # 0000 0011 (Direction_Set): ; line_number = 135 ; mode := 2 ;info 135, 124 movlw 2 movwf main__mode ; line_number = 136 ; result := 0 ;info 136, 126 clrf main__result ; line_number = 137 ; transmit := _true ;info 137, 127 bsf main__transmit___byte, main__transmit___bit goto main__12 ; line_number = 138 ; case 4 main__9: ; # 0000 0100 (Analog_Read): ; line_number = 140 ; result := analog_read() ;info 140, 129 call analog_read movwf main__result ; line_number = 141 ; transmit := _true ;info 141, 131 bsf main__transmit___byte, main__transmit___bit goto main__12 ; line_number = 142 ; case 5 main__10: ; # 0000 0100 (Analog_Set): ; line_number = 144 ; mode := 3 ;info 144, 133 movlw 3 movwf main__mode ; line_number = 145 ; result := 0 ;info 145, 135 clrf main__result ; line_number = 146 ; transmit := _true ;info 146, 136 bsf main__transmit___byte, main__transmit___bit main__12: ; line_number = 119 ; switch command & 7 done goto main__23 ; line_number = 148 ; case 2 main__17: ; # 0001 0ccc (Analog8_Read): ; line_number = 150 ; do_nothing ;info 150, 138 goto main__23 ; line_number = 151 ; case 3 main__18: ; # 0001 1ccc (Analog10_Read): ; line_number = 153 ; do_nothing ;info 153, 139 goto main__23 ; line_number = 154 ; case 4, 5 main__19: ; # 0010 dddd (Low_Set): ; line_number = 156 ; result := digital_read() ;info 156, 140 call digital_read movwf main__result ; line_number = 157 ; transmit := _true ;info 157, 142 bsf main__transmit___byte, main__transmit___bit ; line_number = 158 ; call digital_set(result & 0xf0 | command & 0xf) ;info 158, 143 main__13 equ globals___0+22 movlw 240 andwf main__result,w movwf main__13 movlw 15 andwf main__command,w iorwf main__13,w call digital_set goto main__23 ; line_number = 159 ; case 6, 7 main__20: ; # 0011 dddd (High_Set): ; line_number = 161 ; result := digital_read() ;info 161, 151 call digital_read movwf main__result ; line_number = 162 ; transmit := _true ;info 162, 153 bsf main__transmit___byte, main__transmit___bit ; line_number = 163 ; call digital_set(result & 0xf | (command & 0xf) << 4) ;info 163, 154 main__14 equ globals___0+22 movlw 15 andwf main__result,w movwf main__14 main__15 equ globals___0+23 movlw 15 andwf main__command,w movwf main__15 swapf main__15,f andlw 240 iorwf main__14,w call digital_set main__23: ; line_number = 115 ; switch (command >> 3) & 7 done goto main__39 ; line_number = 164 ; case 3 main__36: ; # 11xx xxxx: ; line_number = 166 ; switch (command >> 3) & 7 start ;info 166, 165 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__32>>8 movwf __pclath main__33 equ globals___0+22 rrf main__command,w movwf main__33 rrf main__33,f rrf main__33,w andlw 7 ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__32 movwf __pcl ; page_group 8 main__32: goto main__34 goto main__34 goto main__34 goto main__34 goto main__34 goto main__34 goto main__34 goto main__31 ; line_number = 167 ; case 7 main__31: ; # 1111 1xxx: ; line_number = 169 ; switch command & 7 start ;info 169, 182 ; switch_before:(data:XX=cc=>XX code:XX=cc=>XX) size=0 movlw main__29>>8 movwf __pclath movlw 7 andwf main__command,w ; switch after expression:(data:00=uu=>00 code:XX=cc=>XX) addlw main__29 movwf __pcl ; page_group 8 main__29: goto main__30 goto main__30 goto main__30 goto main__30 goto main__25 goto main__26 goto main__27 goto main__28 ; line_number = 170 ; case 4 main__25: ; # 1111 1100 (Address_Set) goto main__30 ; line_number = 172 ; case 5 main__26: ; # 1111 1101 (Id_Next) ; line_number = 174 ; transmit := _true ;info 174, 197 bsf main__transmit___byte, main__transmit___bit ; line_number = 175 ; result := 0 ;info 175, 198 clrf main__result ; line_number = 176 ; if id_index < id.size start ;info 176, 199 movlw 26 subwf id_index,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=0 false.size=4 ; No 2TEST: true.size=0 false.size=4 ; 1GOTO: Single test with GOTO btfsc __c___byte, __c___bit goto main__24 ; line_number = 177 ; result := id[id_index] ;info 177, 203 movf id_index,w call id movwf main__result ; line_number = 178 ; id_index := id_index + 1 ;info 178, 206 incf id_index,f main__24: ; Recombine size1 = 0 || size2 = 0 ; line_number = 176 ; if id_index < id.size done ; #result := id_index goto main__30 ; line_number = 180 ; case 6 main__27: ; # 1111 1110 (Id_Start) ; line_number = 182 ; id_index := 0 ;info 182, 208 clrf id_index ; line_number = 183 ; result := 0 ;info 183, 209 clrf main__result ; line_number = 184 ; transmit := _true ;info 184, 210 bsf main__transmit___byte, main__transmit___bit goto main__30 ; line_number = 185 ; case 7 main__28: ; # 1111 1111 (Deselect): ; line_number = 187 ; result := 0 ;info 187, 212 clrf main__result ; line_number = 188 ; transmit := _true ;info 188, 213 bsf main__transmit___byte, main__transmit___bit ; line_number = 189 ; _adden := _true ;info 189, 214 bsf _adden___byte, _adden___bit main__30: ; line_number = 169 ; switch command & 7 done main__34: ; line_number = 166 ; switch (command >> 3) & 7 done main__39: ; line_number = 112 ; switch command >> 6 done goto main__45 ; line_number = 190 ; case 1 main__41: ; # Digital8Write ; line_number = 192 ; call digital_set(command) ;info 192, 216 movf main__command,w call digital_set ; line_number = 193 ; result := digital_read() ;info 193, 218 call digital_read movwf main__result ; line_number = 194 ; transmit := _true ;info 194, 220 bsf main__transmit___byte, main__transmit___bit ; line_number = 195 ; mode := 0 ;info 195, 221 clrf main__mode goto main__45 ; line_number = 196 ; case 2 main__42: ; # Direction_Set: ; line_number = 198 ; call direction_set(command) ;info 198, 223 movf main__command,w call direction_set ; line_number = 199 ; result := command ;info 199, 225 movf main__command,w movwf main__result ; line_number = 200 ; transmit := _true ;info 200, 227 bsf main__transmit___byte, main__transmit___bit ; line_number = 201 ; mode := 0 ;info 201, 228 clrf main__mode goto main__45 ; line_number = 202 ; case 3 main__43: ; # Analog_Set: ; line_number = 204 ; call analog_set(command) ;info 204, 230 movf main__command,w call analog_set ; line_number = 205 ; result := 0 ;info 205, 232 clrf main__result ; line_number = 206 ; transmit := _true ;info 206, 233 bsf main__transmit___byte, main__transmit___bit ; line_number = 207 ; mode := 0 ;info 207, 234 clrf main__mode main__45: ; line_number = 109 ; switch mode done main__49: ; 2GOTO: code1 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code2 final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; 2GOTO: code final bitstates:(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 96 ; if rx9d done ; #loop_exactly 10 ; # delay 200 ; # do_nothing ; line_number = 213 ; if transmit start ;info 213, 235 ; =>bit_code_emit@symbol(): sym=main__transmit ; No 1TEST: true.size=3 false.size=0 ; No 2TEST: true.size=3 false.size=0 ; 1GOTO: Single test with GOTO btfss main__transmit___byte, main__transmit___bit goto main__50 ; line_number = 214 ; call _uart_byte_put(result) ;info 214, 237 movf main__result,w call _uart_byte_put ; # Dispose of echoed command in buffer: ; line_number = 217 ; call _uart_byte_get() ;info 217, 239 call _uart_byte_get ; Recombine size1 = 0 || size2 = 0 main__50: ; line_number = 213 ; if transmit done ; line_number = 86 ; loop_forever wrap-up goto main__3 ; line_number = 86 ; loop_forever done ; delay after procedure statements=non-uniform ; line_number = 220 ; string id = "\16,0,3,1,3,12\Midimotor2-A\7\Gramson" start ; id = '\16,0,3,1,3,12\Midimotor2-A\7\Gramson' id: ; Temporarily save index into FSR movwf __fsr ; Initialize PCLATH to point to this code page movlw id___base>>8 movwf __pclath ; Restore index from FSR movf __fsr,w addlw id___base ; Index to the correct return value movwf __pcl ; page_group 26 ; Add 9 NOP's until start of new page nop nop nop nop nop nop nop nop nop id___base: retlw 16 retlw 0 retlw 3 retlw 1 retlw 3 retlw 12 retlw 77 retlw 105 retlw 100 retlw 105 retlw 109 retlw 111 retlw 116 retlw 111 retlw 114 retlw 50 retlw 45 retlw 65 retlw 7 retlw 71 retlw 114 retlw 97 retlw 109 retlw 115 retlw 111 retlw 110 ; line_number = 220 ; string id = "\16,0,3,1,3,12\Midimotor2-A\7\Gramson" start ; line_number = 222 ;info 222, 282 ; procedure analog_read analog_read: ; arguments_none ; line_number = 224 ; returns byte ; # This procedure will return the analog selection bits. ; line_number = 228 ; local analog byte analog_read__analog equ globals___0+8 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 230 ; analog := 0 ;info 230, 282 clrf analog_read__analog ; line_number = 231 ; if _ansel@0 start ;info 231, 283 analog_read__select__2___byte equ _ansel analog_read__select__2___bit equ 0 ; =>bit_code_emit@symbol(): sym=analog_read__select__2 ; 1TEST: Single test with code in skip slot bsf __rp0___byte, __rp0___bit btfsc analog_read__select__2___byte, analog_read__select__2___bit ; line_number = 232 ; analog@0 := _true ;info 232, 285 analog_read__select__1___byte equ analog_read__analog analog_read__select__1___bit equ 0 bsf analog_read__select__1___byte, analog_read__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 231 ; if _ansel@0 done ; line_number = 233 ; if _ansel@1 start ;info 233, 286 analog_read__select__4___byte equ _ansel analog_read__select__4___bit equ 1 ; =>bit_code_emit@symbol(): sym=analog_read__select__4 ; 1TEST: Single test with code in skip slot btfsc analog_read__select__4___byte, analog_read__select__4___bit ; line_number = 234 ; analog@1 := _true ;info 234, 287 analog_read__select__3___byte equ analog_read__analog analog_read__select__3___bit equ 1 bsf analog_read__select__3___byte, analog_read__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 233 ; if _ansel@1 done ; line_number = 235 ; if _ansel@2 start ;info 235, 288 analog_read__select__6___byte equ _ansel analog_read__select__6___bit equ 2 ; =>bit_code_emit@symbol(): sym=analog_read__select__6 ; 1TEST: Single test with code in skip slot btfsc analog_read__select__6___byte, analog_read__select__6___bit ; line_number = 236 ; analog@2 := _true ;info 236, 289 analog_read__select__5___byte equ analog_read__analog analog_read__select__5___bit equ 2 bsf analog_read__select__5___byte, analog_read__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 235 ; if _ansel@2 done ; line_number = 237 ; if _ansel@3 start ;info 237, 290 analog_read__select__8___byte equ _ansel analog_read__select__8___bit equ 3 ; =>bit_code_emit@symbol(): sym=analog_read__select__8 ; 1TEST: Single test with code in skip slot btfsc analog_read__select__8___byte, analog_read__select__8___bit ; line_number = 238 ; analog@3 := _true ;info 238, 291 analog_read__select__7___byte equ analog_read__analog analog_read__select__7___bit equ 3 bsf analog_read__select__7___byte, analog_read__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 237 ; if _ansel@3 done ; line_number = 239 ; if _ansel@4 start ;info 239, 292 analog_read__select__10___byte equ _ansel analog_read__select__10___bit equ 4 ; =>bit_code_emit@symbol(): sym=analog_read__select__10 ; 1TEST: Single test with code in skip slot btfsc analog_read__select__10___byte, analog_read__select__10___bit ; line_number = 240 ; analog@4 := _true ;info 240, 293 analog_read__select__9___byte equ analog_read__analog analog_read__select__9___bit equ 4 bsf analog_read__select__9___byte, analog_read__select__9___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 239 ; if _ansel@4 done ; line_number = 241 ; if _ansel@5 start ;info 241, 294 analog_read__select__12___byte equ _ansel analog_read__select__12___bit equ 5 ; =>bit_code_emit@symbol(): sym=analog_read__select__12 ; 1TEST: Single test with code in skip slot btfsc analog_read__select__12___byte, analog_read__select__12___bit ; line_number = 242 ; analog@5 := _true ;info 242, 295 analog_read__select__11___byte equ analog_read__analog analog_read__select__11___bit equ 5 bsf analog_read__select__11___byte, analog_read__select__11___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 241 ; if _ansel@5 done ; line_number = 243 ; if _ansel@6 start ;info 243, 296 analog_read__select__14___byte equ _ansel analog_read__select__14___bit equ 6 ; =>bit_code_emit@symbol(): sym=analog_read__select__14 ; 1TEST: Single test with code in skip slot btfsc analog_read__select__14___byte, analog_read__select__14___bit ; line_number = 244 ; analog@6 := _true ;info 244, 297 analog_read__select__13___byte equ analog_read__analog analog_read__select__13___bit equ 6 bsf analog_read__select__13___byte, analog_read__select__13___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 243 ; if _ansel@6 done ; line_number = 245 ; if _ansel@7 start ;info 245, 298 analog_read__select__16___byte equ _ansel analog_read__select__16___bit equ 7 ; =>bit_code_emit@symbol(): sym=analog_read__select__16 ; 1TEST: Single test with code in skip slot btfsc analog_read__select__16___byte, analog_read__select__16___bit ; line_number = 246 ; analog@7 := _true ;info 246, 299 analog_read__select__15___byte equ analog_read__analog analog_read__select__15___bit equ 7 bsf analog_read__select__15___byte, analog_read__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 245 ; if _ansel@7 done ; line_number = 247 ; return analog start ; line_number = 247 ;info 247, 300 bcf __rp0___byte, __rp0___bit movf analog_read__analog,w return ; line_number = 247 ; return analog done ; delay after procedure statements=non-uniform ; line_number = 250 ;info 250, 303 ; procedure analog_set analog_set: ; Last argument is sitting in W; save into argument variable movwf analog_set__analog ; delay=4294967295 ; line_number = 251 ; argument analog byte analog_set__analog equ globals___0+9 ; line_number = 252 ; returns_nothing ; # This procedure will set the analog inputs to be equal to {analog}. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 256 ; if analog@0 start ;info 256, 304 analog_set__select__2___byte equ analog_set__analog analog_set__select__2___bit equ 0 ; =>bit_code_emit@symbol(): sym=analog_set__select__2 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__2___byte, analog_set__select__2___bit ; line_number = 257 ; _ansel@0 := _true ;info 257, 305 analog_set__select__1___byte equ _ansel analog_set__select__1___bit equ 0 bsf analog_set__select__1___byte, analog_set__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 256 ; if analog@0 done ; line_number = 258 ; if analog@1 start ;info 258, 306 analog_set__select__4___byte equ analog_set__analog analog_set__select__4___bit equ 1 ; =>bit_code_emit@symbol(): sym=analog_set__select__4 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__4___byte, analog_set__select__4___bit ; line_number = 259 ; _ansel@1 := _true ;info 259, 307 analog_set__select__3___byte equ _ansel analog_set__select__3___bit equ 1 bsf analog_set__select__3___byte, analog_set__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 258 ; if analog@1 done ; line_number = 260 ; if analog@2 start ;info 260, 308 analog_set__select__6___byte equ analog_set__analog analog_set__select__6___bit equ 2 ; =>bit_code_emit@symbol(): sym=analog_set__select__6 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__6___byte, analog_set__select__6___bit ; line_number = 261 ; _ansel@2 := _true ;info 261, 309 analog_set__select__5___byte equ _ansel analog_set__select__5___bit equ 2 bsf analog_set__select__5___byte, analog_set__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 260 ; if analog@2 done ; line_number = 262 ; if analog@3 start ;info 262, 310 analog_set__select__8___byte equ analog_set__analog analog_set__select__8___bit equ 3 ; =>bit_code_emit@symbol(): sym=analog_set__select__8 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__8___byte, analog_set__select__8___bit ; line_number = 263 ; _ansel@3 := _true ;info 263, 311 analog_set__select__7___byte equ _ansel analog_set__select__7___bit equ 3 bsf analog_set__select__7___byte, analog_set__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 262 ; if analog@3 done ; line_number = 264 ; if analog@4 start ;info 264, 312 analog_set__select__10___byte equ analog_set__analog analog_set__select__10___bit equ 4 ; =>bit_code_emit@symbol(): sym=analog_set__select__10 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__10___byte, analog_set__select__10___bit ; line_number = 265 ; _ansel@4 := _true ;info 265, 313 analog_set__select__9___byte equ _ansel analog_set__select__9___bit equ 4 bsf analog_set__select__9___byte, analog_set__select__9___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 264 ; if analog@4 done ; line_number = 266 ; if analog@5 start ;info 266, 314 analog_set__select__12___byte equ analog_set__analog analog_set__select__12___bit equ 5 ; =>bit_code_emit@symbol(): sym=analog_set__select__12 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__12___byte, analog_set__select__12___bit ; line_number = 267 ; _ansel@5 := _true ;info 267, 315 analog_set__select__11___byte equ _ansel analog_set__select__11___bit equ 5 bsf analog_set__select__11___byte, analog_set__select__11___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 266 ; if analog@5 done ; line_number = 268 ; if analog@6 start ;info 268, 316 analog_set__select__14___byte equ analog_set__analog analog_set__select__14___bit equ 6 ; =>bit_code_emit@symbol(): sym=analog_set__select__14 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__14___byte, analog_set__select__14___bit ; line_number = 269 ; _ansel@6 := _true ;info 269, 317 analog_set__select__13___byte equ _ansel analog_set__select__13___bit equ 6 bsf analog_set__select__13___byte, analog_set__select__13___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 268 ; if analog@6 done ; line_number = 270 ; if analog@7 start ;info 270, 318 analog_set__select__16___byte equ analog_set__analog analog_set__select__16___bit equ 7 ; =>bit_code_emit@symbol(): sym=analog_set__select__16 ; 1TEST: Single test with code in skip slot btfsc analog_set__select__16___byte, analog_set__select__16___bit ; line_number = 271 ; _ansel@7 := _true ;info 271, 319 analog_set__select__15___byte equ _ansel analog_set__select__15___bit equ 7 bsf analog_set__select__15___byte, analog_set__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 270 ; if analog@7 done ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 274 ;info 274, 321 ; procedure digital_read digital_read: ; arguments_none ; line_number = 276 ; returns byte ; # This procedure will return the digital bits corresponding to ; # the 8 digital data inputs. ; line_number = 281 ; local ra byte digital_read__ra equ globals___0+10 ; line_number = 282 ; local rc byte digital_read__rc equ globals___0+11 ; line_number = 283 ; local digital byte digital_read__digital equ globals___0+12 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 285 ; ra := _porta ;info 285, 321 movf _porta,w movwf digital_read__ra ; line_number = 286 ; rc := _portc ;info 286, 323 movf _portc,w movwf digital_read__rc ; line_number = 287 ; digital := 0 ;info 287, 325 clrf digital_read__digital ; line_number = 289 ; if ra@io0_bit start ;info 289, 326 digital_read__select__2___byte equ digital_read__ra digital_read__select__2___bit equ 0 ; =>bit_code_emit@symbol(): sym=digital_read__select__2 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__2___byte, digital_read__select__2___bit ; line_number = 290 ; digital@0 := _true ;info 290, 327 digital_read__select__1___byte equ digital_read__digital digital_read__select__1___bit equ 0 bsf digital_read__select__1___byte, digital_read__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 289 ; if ra@io0_bit done ; line_number = 291 ; if ra@io1_bit start ;info 291, 328 digital_read__select__4___byte equ digital_read__ra digital_read__select__4___bit equ 4 ; =>bit_code_emit@symbol(): sym=digital_read__select__4 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__4___byte, digital_read__select__4___bit ; line_number = 292 ; digital@1 := _true ;info 292, 329 digital_read__select__3___byte equ digital_read__digital digital_read__select__3___bit equ 1 bsf digital_read__select__3___byte, digital_read__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 291 ; if ra@io1_bit done ; line_number = 293 ; if ra@io2_bit start ;info 293, 330 digital_read__select__6___byte equ digital_read__ra digital_read__select__6___bit equ 1 ; =>bit_code_emit@symbol(): sym=digital_read__select__6 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__6___byte, digital_read__select__6___bit ; line_number = 294 ; digital@2 := _true ;info 294, 331 digital_read__select__5___byte equ digital_read__digital digital_read__select__5___bit equ 2 bsf digital_read__select__5___byte, digital_read__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 293 ; if ra@io2_bit done ; line_number = 295 ; if ra@io3_bit start ;info 295, 332 digital_read__select__8___byte equ digital_read__ra digital_read__select__8___bit equ 2 ; =>bit_code_emit@symbol(): sym=digital_read__select__8 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__8___byte, digital_read__select__8___bit ; line_number = 296 ; digital@3 := _true ;info 296, 333 digital_read__select__7___byte equ digital_read__digital digital_read__select__7___bit equ 3 bsf digital_read__select__7___byte, digital_read__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 295 ; if ra@io3_bit done ; line_number = 297 ; if rc@io4_bit start ;info 297, 334 digital_read__select__10___byte equ digital_read__rc digital_read__select__10___bit equ 0 ; =>bit_code_emit@symbol(): sym=digital_read__select__10 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__10___byte, digital_read__select__10___bit ; line_number = 298 ; digital@4 := _true ;info 298, 335 digital_read__select__9___byte equ digital_read__digital digital_read__select__9___bit equ 4 bsf digital_read__select__9___byte, digital_read__select__9___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 297 ; if rc@io4_bit done ; line_number = 299 ; if rc@io5_bit start ;info 299, 336 digital_read__select__12___byte equ digital_read__rc digital_read__select__12___bit equ 1 ; =>bit_code_emit@symbol(): sym=digital_read__select__12 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__12___byte, digital_read__select__12___bit ; line_number = 300 ; digital@5 := _true ;info 300, 337 digital_read__select__11___byte equ digital_read__digital digital_read__select__11___bit equ 5 bsf digital_read__select__11___byte, digital_read__select__11___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 299 ; if rc@io5_bit done ; line_number = 301 ; if rc@io6_bit start ;info 301, 338 digital_read__select__14___byte equ digital_read__rc digital_read__select__14___bit equ 2 ; =>bit_code_emit@symbol(): sym=digital_read__select__14 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__14___byte, digital_read__select__14___bit ; line_number = 302 ; digital@6 := _true ;info 302, 339 digital_read__select__13___byte equ digital_read__digital digital_read__select__13___bit equ 6 bsf digital_read__select__13___byte, digital_read__select__13___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 301 ; if rc@io6_bit done ; line_number = 303 ; if rc@io7_bit start ;info 303, 340 digital_read__select__16___byte equ digital_read__rc digital_read__select__16___bit equ 3 ; =>bit_code_emit@symbol(): sym=digital_read__select__16 ; 1TEST: Single test with code in skip slot btfsc digital_read__select__16___byte, digital_read__select__16___bit ; line_number = 304 ; digital@7 := _true ;info 304, 341 digital_read__select__15___byte equ digital_read__digital digital_read__select__15___bit equ 7 bsf digital_read__select__15___byte, digital_read__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 303 ; if rc@io7_bit done ; line_number = 305 ; return digital start ; line_number = 305 ;info 305, 342 movf digital_read__digital,w return ; line_number = 305 ; return digital done ; delay after procedure statements=non-uniform ; line_number = 308 ;info 308, 344 ; procedure digital_set digital_set: ; Last argument is sitting in W; save into argument variable movwf digital_set__digital ; delay=4294967295 ; line_number = 309 ; argument digital byte digital_set__digital equ globals___0+15 ; line_number = 310 ; returns_nothing ; # This procedure will set the digital outputs to be equal to {digital}. ; line_number = 314 ; local ra byte digital_set__ra equ globals___0+13 ; line_number = 315 ; local rc byte digital_set__rc equ globals___0+14 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 317 ; ra := 0 ;info 317, 345 clrf digital_set__ra ; line_number = 318 ; rc := 0 ;info 318, 346 clrf digital_set__rc ; line_number = 319 ; if digital@0 start ;info 319, 347 digital_set__select__2___byte equ digital_set__digital digital_set__select__2___bit equ 0 ; =>bit_code_emit@symbol(): sym=digital_set__select__2 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__2___byte, digital_set__select__2___bit ; line_number = 320 ; ra@io0_bit := _true ;info 320, 348 digital_set__select__1___byte equ digital_set__ra digital_set__select__1___bit equ 0 bsf digital_set__select__1___byte, digital_set__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 319 ; if digital@0 done ; line_number = 321 ; if digital@1 start ;info 321, 349 digital_set__select__4___byte equ digital_set__digital digital_set__select__4___bit equ 1 ; =>bit_code_emit@symbol(): sym=digital_set__select__4 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__4___byte, digital_set__select__4___bit ; line_number = 322 ; ra@io1_bit := _true ;info 322, 350 digital_set__select__3___byte equ digital_set__ra digital_set__select__3___bit equ 4 bsf digital_set__select__3___byte, digital_set__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 321 ; if digital@1 done ; line_number = 323 ; if digital@2 start ;info 323, 351 digital_set__select__6___byte equ digital_set__digital digital_set__select__6___bit equ 2 ; =>bit_code_emit@symbol(): sym=digital_set__select__6 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__6___byte, digital_set__select__6___bit ; line_number = 324 ; ra@io2_bit := _true ;info 324, 352 digital_set__select__5___byte equ digital_set__ra digital_set__select__5___bit equ 1 bsf digital_set__select__5___byte, digital_set__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 323 ; if digital@2 done ; line_number = 325 ; if digital@3 start ;info 325, 353 digital_set__select__8___byte equ digital_set__digital digital_set__select__8___bit equ 3 ; =>bit_code_emit@symbol(): sym=digital_set__select__8 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__8___byte, digital_set__select__8___bit ; line_number = 326 ; ra@io3_bit := _true ;info 326, 354 digital_set__select__7___byte equ digital_set__ra digital_set__select__7___bit equ 2 bsf digital_set__select__7___byte, digital_set__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 325 ; if digital@3 done ; line_number = 327 ; if digital@4 start ;info 327, 355 digital_set__select__10___byte equ digital_set__digital digital_set__select__10___bit equ 4 ; =>bit_code_emit@symbol(): sym=digital_set__select__10 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__10___byte, digital_set__select__10___bit ; line_number = 328 ; rc@io4_bit := _true ;info 328, 356 digital_set__select__9___byte equ digital_set__rc digital_set__select__9___bit equ 0 bsf digital_set__select__9___byte, digital_set__select__9___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 327 ; if digital@4 done ; line_number = 329 ; if digital@5 start ;info 329, 357 digital_set__select__12___byte equ digital_set__digital digital_set__select__12___bit equ 5 ; =>bit_code_emit@symbol(): sym=digital_set__select__12 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__12___byte, digital_set__select__12___bit ; line_number = 330 ; rc@io5_bit := _true ;info 330, 358 digital_set__select__11___byte equ digital_set__rc digital_set__select__11___bit equ 1 bsf digital_set__select__11___byte, digital_set__select__11___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 329 ; if digital@5 done ; line_number = 331 ; if digital@6 start ;info 331, 359 digital_set__select__14___byte equ digital_set__digital digital_set__select__14___bit equ 6 ; =>bit_code_emit@symbol(): sym=digital_set__select__14 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__14___byte, digital_set__select__14___bit ; line_number = 332 ; rc@io6_bit := _true ;info 332, 360 digital_set__select__13___byte equ digital_set__rc digital_set__select__13___bit equ 2 bsf digital_set__select__13___byte, digital_set__select__13___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 331 ; if digital@6 done ; line_number = 333 ; if digital@7 start ;info 333, 361 digital_set__select__16___byte equ digital_set__digital digital_set__select__16___bit equ 7 ; =>bit_code_emit@symbol(): sym=digital_set__select__16 ; 1TEST: Single test with code in skip slot btfsc digital_set__select__16___byte, digital_set__select__16___bit ; line_number = 334 ; rc@io7_bit := _true ;info 334, 362 digital_set__select__15___byte equ digital_set__rc digital_set__select__15___bit equ 3 bsf digital_set__select__15___byte, digital_set__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 333 ; if digital@7 done ; line_number = 335 ; _porta := ra ;info 335, 363 movf digital_set__ra,w movwf _porta ; line_number = 336 ; _portc := rc ;info 336, 365 movf digital_set__rc,w movwf _portc ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 339 ;info 339, 368 ; procedure direction_read direction_read: ; arguments_none ; line_number = 341 ; returns byte ; # This procedure will return the digital bits corresponding to ; # the 8 digital data inputs. ; line_number = 346 ; local trisa byte direction_read__trisa equ globals___0+16 ; line_number = 347 ; local trisc byte direction_read__trisc equ globals___0+17 ; line_number = 348 ; local direction byte direction_read__direction equ globals___0+18 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 350 ; direction := 0 ;info 350, 368 clrf direction_read__direction ; # Get all data into data bank 0: ; line_number = 352 ; trisa := _trisa ;info 352, 369 bsf __rp0___byte, __rp0___bit movf _trisa,w bcf __rp0___byte, __rp0___bit movwf direction_read__trisa ; line_number = 353 ; trisc := _trisc ;info 353, 373 bsf __rp0___byte, __rp0___bit movf _trisc,w bcf __rp0___byte, __rp0___bit movwf direction_read__trisc ; line_number = 355 ; if trisa@io0_bit start ;info 355, 377 direction_read__select__2___byte equ direction_read__trisa direction_read__select__2___bit equ 0 ; =>bit_code_emit@symbol(): sym=direction_read__select__2 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__2___byte, direction_read__select__2___bit ; line_number = 356 ; direction@0 := _true ;info 356, 378 direction_read__select__1___byte equ direction_read__direction direction_read__select__1___bit equ 0 bsf direction_read__select__1___byte, direction_read__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 355 ; if trisa@io0_bit done ; line_number = 357 ; if trisa@io1_bit start ;info 357, 379 direction_read__select__4___byte equ direction_read__trisa direction_read__select__4___bit equ 4 ; =>bit_code_emit@symbol(): sym=direction_read__select__4 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__4___byte, direction_read__select__4___bit ; line_number = 358 ; direction@1 := _true ;info 358, 380 direction_read__select__3___byte equ direction_read__direction direction_read__select__3___bit equ 1 bsf direction_read__select__3___byte, direction_read__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 357 ; if trisa@io1_bit done ; line_number = 359 ; if trisa@io2_bit start ;info 359, 381 direction_read__select__6___byte equ direction_read__trisa direction_read__select__6___bit equ 1 ; =>bit_code_emit@symbol(): sym=direction_read__select__6 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__6___byte, direction_read__select__6___bit ; line_number = 360 ; direction@2 := _true ;info 360, 382 direction_read__select__5___byte equ direction_read__direction direction_read__select__5___bit equ 2 bsf direction_read__select__5___byte, direction_read__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 359 ; if trisa@io2_bit done ; line_number = 361 ; if trisa@io3_bit start ;info 361, 383 direction_read__select__8___byte equ direction_read__trisa direction_read__select__8___bit equ 2 ; =>bit_code_emit@symbol(): sym=direction_read__select__8 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__8___byte, direction_read__select__8___bit ; line_number = 362 ; direction@3 := _true ;info 362, 384 direction_read__select__7___byte equ direction_read__direction direction_read__select__7___bit equ 3 bsf direction_read__select__7___byte, direction_read__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 361 ; if trisa@io3_bit done ; line_number = 363 ; if trisc@io4_bit start ;info 363, 385 direction_read__select__10___byte equ direction_read__trisc direction_read__select__10___bit equ 0 ; =>bit_code_emit@symbol(): sym=direction_read__select__10 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__10___byte, direction_read__select__10___bit ; line_number = 364 ; direction@4 := _true ;info 364, 386 direction_read__select__9___byte equ direction_read__direction direction_read__select__9___bit equ 4 bsf direction_read__select__9___byte, direction_read__select__9___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 363 ; if trisc@io4_bit done ; line_number = 365 ; if trisc@io5_bit start ;info 365, 387 direction_read__select__12___byte equ direction_read__trisc direction_read__select__12___bit equ 1 ; =>bit_code_emit@symbol(): sym=direction_read__select__12 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__12___byte, direction_read__select__12___bit ; line_number = 366 ; direction@5 := _true ;info 366, 388 direction_read__select__11___byte equ direction_read__direction direction_read__select__11___bit equ 5 bsf direction_read__select__11___byte, direction_read__select__11___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 365 ; if trisc@io5_bit done ; line_number = 367 ; if trisc@io6_bit start ;info 367, 389 direction_read__select__14___byte equ direction_read__trisc direction_read__select__14___bit equ 2 ; =>bit_code_emit@symbol(): sym=direction_read__select__14 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__14___byte, direction_read__select__14___bit ; line_number = 368 ; direction@6 := _true ;info 368, 390 direction_read__select__13___byte equ direction_read__direction direction_read__select__13___bit equ 6 bsf direction_read__select__13___byte, direction_read__select__13___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 367 ; if trisc@io6_bit done ; line_number = 369 ; if trisc@io7_bit start ;info 369, 391 direction_read__select__16___byte equ direction_read__trisc direction_read__select__16___bit equ 3 ; =>bit_code_emit@symbol(): sym=direction_read__select__16 ; 1TEST: Single test with code in skip slot btfsc direction_read__select__16___byte, direction_read__select__16___bit ; line_number = 370 ; direction@7 := _true ;info 370, 392 direction_read__select__15___byte equ direction_read__direction direction_read__select__15___bit equ 7 bsf direction_read__select__15___byte, direction_read__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 369 ; if trisc@io7_bit done ; line_number = 371 ; return direction start ; line_number = 371 ;info 371, 393 movf direction_read__direction,w return ; line_number = 371 ; return direction done ; delay after procedure statements=non-uniform ; line_number = 374 ;info 374, 395 ; procedure direction_set direction_set: ; Last argument is sitting in W; save into argument variable movwf direction_set__direction ; delay=4294967295 ; line_number = 375 ; argument direction byte direction_set__direction equ globals___0+21 ; line_number = 376 ; returns_nothing ; # This procedure will set the direction outputs to be equal to {direction}. ; line_number = 380 ; local trisa byte direction_set__trisa equ globals___0+19 ; line_number = 381 ; local trisc byte direction_set__trisc equ globals___0+20 ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 383 ; trisa := 0xc0 ;info 383, 396 movlw 192 movwf direction_set__trisa ; line_number = 384 ; trisc := 0xc0 ;info 384, 398 movlw 192 movwf direction_set__trisc ; line_number = 385 ; if direction@0 start ;info 385, 400 direction_set__select__2___byte equ direction_set__direction direction_set__select__2___bit equ 0 ; =>bit_code_emit@symbol(): sym=direction_set__select__2 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__2___byte, direction_set__select__2___bit ; line_number = 386 ; trisa@io0_bit := _true ;info 386, 401 direction_set__select__1___byte equ direction_set__trisa direction_set__select__1___bit equ 0 bsf direction_set__select__1___byte, direction_set__select__1___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 385 ; if direction@0 done ; line_number = 387 ; if direction@1 start ;info 387, 402 direction_set__select__4___byte equ direction_set__direction direction_set__select__4___bit equ 1 ; =>bit_code_emit@symbol(): sym=direction_set__select__4 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__4___byte, direction_set__select__4___bit ; line_number = 388 ; trisa@io1_bit := _true ;info 388, 403 direction_set__select__3___byte equ direction_set__trisa direction_set__select__3___bit equ 4 bsf direction_set__select__3___byte, direction_set__select__3___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 387 ; if direction@1 done ; line_number = 389 ; if direction@2 start ;info 389, 404 direction_set__select__6___byte equ direction_set__direction direction_set__select__6___bit equ 2 ; =>bit_code_emit@symbol(): sym=direction_set__select__6 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__6___byte, direction_set__select__6___bit ; line_number = 390 ; trisa@io2_bit := _true ;info 390, 405 direction_set__select__5___byte equ direction_set__trisa direction_set__select__5___bit equ 1 bsf direction_set__select__5___byte, direction_set__select__5___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 389 ; if direction@2 done ; line_number = 391 ; if direction@3 start ;info 391, 406 direction_set__select__8___byte equ direction_set__direction direction_set__select__8___bit equ 3 ; =>bit_code_emit@symbol(): sym=direction_set__select__8 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__8___byte, direction_set__select__8___bit ; line_number = 392 ; trisa@io3_bit := _true ;info 392, 407 direction_set__select__7___byte equ direction_set__trisa direction_set__select__7___bit equ 2 bsf direction_set__select__7___byte, direction_set__select__7___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 391 ; if direction@3 done ; line_number = 393 ; if direction@4 start ;info 393, 408 direction_set__select__10___byte equ direction_set__direction direction_set__select__10___bit equ 4 ; =>bit_code_emit@symbol(): sym=direction_set__select__10 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__10___byte, direction_set__select__10___bit ; line_number = 394 ; trisc@io4_bit := _true ;info 394, 409 direction_set__select__9___byte equ direction_set__trisc direction_set__select__9___bit equ 0 bsf direction_set__select__9___byte, direction_set__select__9___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 393 ; if direction@4 done ; line_number = 395 ; if direction@5 start ;info 395, 410 direction_set__select__12___byte equ direction_set__direction direction_set__select__12___bit equ 5 ; =>bit_code_emit@symbol(): sym=direction_set__select__12 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__12___byte, direction_set__select__12___bit ; line_number = 396 ; trisc@io5_bit := _true ;info 396, 411 direction_set__select__11___byte equ direction_set__trisc direction_set__select__11___bit equ 1 bsf direction_set__select__11___byte, direction_set__select__11___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 395 ; if direction@5 done ; line_number = 397 ; if direction@6 start ;info 397, 412 direction_set__select__14___byte equ direction_set__direction direction_set__select__14___bit equ 6 ; =>bit_code_emit@symbol(): sym=direction_set__select__14 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__14___byte, direction_set__select__14___bit ; line_number = 398 ; trisc@io6_bit := _true ;info 398, 413 direction_set__select__13___byte equ direction_set__trisc direction_set__select__13___bit equ 2 bsf direction_set__select__13___byte, direction_set__select__13___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 397 ; if direction@6 done ; line_number = 399 ; if direction@7 start ;info 399, 414 direction_set__select__16___byte equ direction_set__direction direction_set__select__16___bit equ 7 ; =>bit_code_emit@symbol(): sym=direction_set__select__16 ; 1TEST: Single test with code in skip slot btfsc direction_set__select__16___byte, direction_set__select__16___bit ; line_number = 400 ; trisc@io7_bit := _true ;info 400, 415 direction_set__select__15___byte equ direction_set__trisc direction_set__select__15___bit equ 3 bsf direction_set__select__15___byte, direction_set__select__15___bit ; Recombine size1 = 0 || size2 = 0 ; line_number = 399 ; if direction@7 done ; line_number = 401 ; trisc@rx_bit := _true ;info 401, 416 direction_set__select__17___byte equ direction_set__trisc direction_set__select__17___bit equ 5 bsf direction_set__select__17___byte, direction_set__select__17___bit ; line_number = 402 ; trisc@tx_bit := _true ;info 402, 417 direction_set__select__18___byte equ direction_set__trisc direction_set__select__18___bit equ 4 bsf direction_set__select__18___byte, direction_set__select__18___bit ; line_number = 403 ; _trisa := trisa ;info 403, 418 movf direction_set__trisa,w bsf __rp0___byte, __rp0___bit movwf _trisa ; line_number = 404 ; _trisc := trisc ;info 404, 421 bcf __rp0___byte, __rp0___bit movf direction_set__trisc,w bsf __rp0___byte, __rp0___bit movwf _trisc ; delay after procedure statements=non-uniform bcf __rp0___byte, __rp0___bit ; Implied return retlw 0 ; #procedure byte_put ; # argument response byte ; # returns_nothing ; # ; # # This procedure will send {response} back to the requestor. ; # ; # echo_discard := _true ; # while !_txif ; # do_nothing ; # _tx9d := _false ; # _txreg := response ; # ; # ; #procedure byte_get ; # arguments_none ; # returns byte ; # ; # # This procedure returns the next byte from the bus that is ; # # directed to this module. This procedure handles all address ; # # change (9th bit set) commands that come in. Thus, any byte ; # # returned from this procedure is a command byte that is directed ; # # at this module. ; # ; # local address byte ; # ; # # Keep processing bytes until we've got a command byte for us: ; # loop_forever ; # # Wait for a 9-bit "byte": ; # while !_rcif ; # do_nothing ; # if _rx9d ; # # We have an address byte; read the address: ; # if _rcreg = module_address ; # # We have been selected; start receiving all bytes: ; # _adden := _false ; # # Send a null byte to indicate that we alive and well: ; # _tx9d := _false ; # _txreg := 0 ; # echo_discard := _true ; # else ; # # We have a command or echo byte: ; # if echo_discard ; # # We have an echo: ; # echo_discard := _false ; # _fsr := _rcreg ; # else ; # # We have a real command: ; # return _rcreg ; Appending 7 delayed procedures to code bank 0 ; buffer = '_uart' ; line_number = 7 ;info 7, 427 ; procedure _uart_byte_safe_get _uart_byte_safe_get: ; arguments_none ; line_number = 9 ; returns byte ; # This procedure will the next byte from UART. If no byte ; # received in a reasonable time, 0xfc is returned. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 14 ; loop_exactly 255 start ;info 14, 427 _uart_byte_safe_get__1 equ globals___0+24 movlw 255 movwf _uart_byte_safe_get__1 _uart_byte_safe_get__2: ; line_number = 15 ; loop_exactly 255 start ;info 15, 429 _uart_byte_safe_get__3 equ globals___0+25 movlw 255 movwf _uart_byte_safe_get__3 _uart_byte_safe_get__4: ; line_number = 16 ; if _rcif start ;info 16, 431 ; =>bit_code_emit@symbol(): sym=_rcif ; No 1TEST: true.size=2 false.size=0 ; No 2TEST: true.size=2 false.size=0 ; 1GOTO: Single test with GOTO btfss _rcif___byte, _rcif___bit goto _uart_byte_safe_get__5 ; line_number = 17 ; return _rcreg start ; line_number = 17 ;info 17, 433 movf _rcreg,w return ; line_number = 17 ; return _rcreg done ; Recombine size1 = 0 || size2 = 0 _uart_byte_safe_get__5: ; line_number = 16 ; if _rcif done ; line_number = 15 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__3,f goto _uart_byte_safe_get__4 ; line_number = 15 ; loop_exactly 255 done ; line_number = 14 ; loop_exactly 255 wrap-up decfsz _uart_byte_safe_get__1,f goto _uart_byte_safe_get__2 ; line_number = 14 ; loop_exactly 255 done ; line_number = 18 ; return 0xfc start ; line_number = 18 ;info 18, 439 retlw 252 ; line_number = 18 ; return 0xfc done ; delay after procedure statements=non-uniform ; line_number = 21 ;info 21, 440 ; procedure _uart_byte_get _uart_byte_get: ; arguments_none ; line_number = 23 ; returns byte ; # This procedure will return the next byte from the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 27 ; while !_rcif start _uart_byte_get__1: ;info 27, 440 ; =>bit_code_emit@symbol(): sym=_rcif ; 1TEST: Single test with code in skip slot btfss _rcif___byte, _rcif___bit ; line_number = 28 ; do_nothing ;info 28, 441 goto _uart_byte_get__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 27 ; while !_rcif done ; line_number = 29 ; return _rcreg start ; line_number = 29 ;info 29, 442 movf _rcreg,w return ; line_number = 29 ; return _rcreg done ; delay after procedure statements=non-uniform ; line_number = 32 ;info 32, 444 ; procedure _uart_hex_put _uart_hex_put: ; Last argument is sitting in W; save into argument variable movwf _uart_hex_put__value ; delay=4294967295 ; line_number = 33 ; argument value byte _uart_hex_put__value equ globals___0 ; line_number = 34 ; returns_nothing ; # This procedure will output {value} to the UART as a 2-digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 39 ; call _uart_nibble_put(value >> 4) ;info 39, 445 _uart_hex_put__1 equ globals___0+26 swapf _uart_hex_put__value,w andlw 15 call _uart_nibble_put ; line_number = 40 ; call _uart_nibble_put(value & 0xf) ;info 40, 448 movlw 15 andwf _uart_hex_put__value,w call _uart_nibble_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 43 ;info 43, 452 ; procedure _uart_nibble_put _uart_nibble_put: ; Last argument is sitting in W; save into argument variable movwf _uart_nibble_put__nibble ; delay=4294967295 ; line_number = 44 ; argument nibble byte _uart_nibble_put__nibble equ globals___0+1 ; line_number = 45 ; returns_nothing ; # This procedure will output {value} to UART as a 1 digit ; # hexadecimal number. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 50 ; if nibble < 10 start ;info 50, 453 movlw 10 subwf _uart_nibble_put__nibble,w ; =>bit_code_emit@symbol(): sym=__c ; No 1TEST: true.size=1 false.size=1 ; 2TEST: two tests with code in both delay slots btfsc __c___byte, __c___bit ; line_number = 53 ; nibble := nibble - 10 + 'A' ;info 53, 456 movlw 55 btfss __c___byte, __c___bit ; line_number = 51 ; nibble := nibble + '0' ;info 51, 458 movlw 48 addwf _uart_nibble_put__nibble,f ; line_number = 50 ; if nibble < 10 done ; line_number = 54 ; call _uart_byte_put(nibble) ;info 54, 460 movf _uart_nibble_put__nibble,w call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 57 ;info 57, 463 ; procedure _uart_space_put _uart_space_put: ; arguments_none ; line_number = 59 ; returns_nothing ; # This procedure will output a space to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 63 ; call _uart_byte_put(' ') ;info 63, 463 movlw 32 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 66 ;info 66, 466 ; procedure _uart_crlf_put _uart_crlf_put: ; arguments_none ; line_number = 68 ; returns_nothing ; # This procedure will output a carriage return line feed sequecne to ; # the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 73 ; call _uart_byte_put('\cr\') ;info 73, 466 movlw 13 call _uart_byte_put ; line_number = 74 ; call _uart_byte_put('\lf\') ;info 74, 468 movlw 10 call _uart_byte_put ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; line_number = 77 ;info 77, 471 ; procedure _uart_byte_put _uart_byte_put: ; Last argument is sitting in W; save into argument variable movwf _uart_byte_put__byte ; delay=4294967295 ; line_number = 78 ; argument byte byte _uart_byte_put__byte equ globals___0+2 ; line_number = 79 ; returns_nothing ; # This procedure will send {byte} out using to the UART. ; before procedure statements delay=non-uniform, bit states=(data:00=uu=>00 code:XX=cc=>XX) ; line_number = 83 ; while !_txif start _uart_byte_put__1: ;info 83, 472 ; =>bit_code_emit@symbol(): sym=_txif ; 1TEST: Single test with code in skip slot btfss _txif___byte, _txif___bit ; line_number = 84 ; do_nothing ;info 84, 473 goto _uart_byte_put__1 ; Recombine size1 = 0 || size2 = 0 ; line_number = 83 ; while !_txif done ; line_number = 85 ; _txreg := byte ;info 85, 474 movf _uart_byte_put__byte,w movwf _txreg ; delay after procedure statements=non-uniform ; Implied return retlw 0 ; Configuration bits ; address = 0x2007, fill = 0x3000 ; fcmen = off (0x0) ; ieso = off (0x0) ; boden = off (0x0) ; cpd = off (0x80) ; cp = off (0x40) ; mclre = off (0x0) ; pwrte = off (0x10) ; wdte = off (0x0) ; fosc = hs (0x2) ; 12498 = 0x30d2 __config 12498 ; Define start addresses for data regions ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 ; Region="globals___0" Address=32" Size=80 Bytes=27 Bits=3 Available=52 ; Region="globals___1" Address=160" Size=80 Bytes=0 Bits=0 Available=80 ; Region="globals___2" Address=288" Size=80 Bytes=0 Bits=0 Available=80 ; Region="shared___globals" Address=112" Size=16 Bytes=0 Bits=0 Available=16 end